ProcessorFlags.hpp File Reference

#include <cstdint>
#include "LIEF/visibility.h"

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Namespaces
namespace	LIEF
	LIEF namespace.
namespace	LIEF::ELF
	Namespace related to the LIEF's ELF module.

Enumerations
enum class	LIEF::ELF::PROCESSOR_FLAGS : uint64_t {   LIEF::ELF::ARM_EABI_UNKNOWN = 0x00000000 | (PF_ARM_ID << PFLAGS_BIT) , LIEF::ELF::ARM_SOFT_FLOAT = 0x00000200 | (PF_ARM_ID << PFLAGS_BIT) , LIEF::ELF::ARM_VFP_FLOAT = 0x00000400 | (PF_ARM_ID << PFLAGS_BIT) , LIEF::ELF::ARM_EABI_VER1 = 0x01000000 | (PF_ARM_ID << PFLAGS_BIT) ,   LIEF::ELF::ARM_EABI_VER2 = 0x02000000 | (PF_ARM_ID << PFLAGS_BIT) , LIEF::ELF::ARM_EABI_VER3 = 0x03000000 | (PF_ARM_ID << PFLAGS_BIT) , LIEF::ELF::ARM_EABI_VER4 = 0x04000000 | (PF_ARM_ID << PFLAGS_BIT) , LIEF::ELF::ARM_EABI_VER5 = 0x05000000 | (PF_ARM_ID << PFLAGS_BIT) ,   LIEF::ELF::HEXAGON_MACH_V2 = 0x00000001 | (PF_HEX_ID << PFLAGS_BIT) , LIEF::ELF::HEXAGON_MACH_V3 = 0x00000002 | (PF_HEX_ID << PFLAGS_BIT) , LIEF::ELF::HEXAGON_MACH_V4 = 0x00000003 | (PF_HEX_ID << PFLAGS_BIT) , LIEF::ELF::HEXAGON_MACH_V5 = 0x00000004 | (PF_HEX_ID << PFLAGS_BIT) ,   LIEF::ELF::HEXAGON_ISA_V2 = 0x00000010 | (PF_HEX_ID << PFLAGS_BIT) , LIEF::ELF::HEXAGON_ISA_V3 = 0x00000020 | (PF_HEX_ID << PFLAGS_BIT) , LIEF::ELF::HEXAGON_ISA_V4 = 0x00000030 | (PF_HEX_ID << PFLAGS_BIT) , LIEF::ELF::HEXAGON_ISA_V5 = 0x00000040 | (PF_HEX_ID << PFLAGS_BIT) ,   LIEF::ELF::LOONGARCH_ABI_SOFT_FLOAT = 0x1 | (PF_LOONGARCH_ID << PFLAGS_BIT) , LIEF::ELF::LOONGARCH_ABI_SINGLE_FLOAT = 0x2 | (PF_LOONGARCH_ID << PFLAGS_BIT) , LIEF::ELF::LOONGARCH_ABI_DOUBLE_FLOAT = 0x3 | (PF_LOONGARCH_ID << PFLAGS_BIT) , LIEF::ELF::MIPS_NOREORDER = 0x00000001 | (PF_MIPS_ID << PFLAGS_BIT) ,   LIEF::ELF::MIPS_PIC = 0x00000002 | (PF_MIPS_ID << PFLAGS_BIT) , LIEF::ELF::MIPS_CPIC = 0x00000004 | (PF_MIPS_ID << PFLAGS_BIT) , LIEF::ELF::MIPS_ABI2 = 0x00000020 | (PF_MIPS_ID << PFLAGS_BIT) , LIEF::ELF::MIPS_32BITMODE = 0x00000100 | (PF_MIPS_ID << PFLAGS_BIT) ,   LIEF::ELF::MIPS_FP64 = 0x00000200 | (PF_MIPS_ID << PFLAGS_BIT) , LIEF::ELF::MIPS_NAN2008 = 0x00000400 | (PF_MIPS_ID << PFLAGS_BIT) , LIEF::ELF::MIPS_ABI_O32 = 0x00001000 | (PF_MIPS_ID << PFLAGS_BIT) , LIEF::ELF::MIPS_ABI_O64 = 0x00002000 | (PF_MIPS_ID << PFLAGS_BIT) ,   LIEF::ELF::MIPS_ABI_EABI32 = 0x00003000 | (PF_MIPS_ID << PFLAGS_BIT) , LIEF::ELF::MIPS_ABI_EABI64 = 0x00004000 | (PF_MIPS_ID << PFLAGS_BIT) , LIEF::ELF::MIPS_MACH_3900 = 0x00810000 | (PF_MIPS_ID << PFLAGS_BIT) , LIEF::ELF::MIPS_MACH_4010 = 0x00820000 | (PF_MIPS_ID << PFLAGS_BIT) ,   LIEF::ELF::MIPS_MACH_4100 = 0x00830000 | (PF_MIPS_ID << PFLAGS_BIT) , LIEF::ELF::MIPS_MACH_4650 = 0x00850000 | (PF_MIPS_ID << PFLAGS_BIT) , LIEF::ELF::MIPS_MACH_4120 = 0x00870000 | (PF_MIPS_ID << PFLAGS_BIT) , LIEF::ELF::MIPS_MACH_4111 = 0x00880000 | (PF_MIPS_ID << PFLAGS_BIT) ,   LIEF::ELF::MIPS_MACH_SB1 = 0x008a0000 | (PF_MIPS_ID << PFLAGS_BIT) , LIEF::ELF::MIPS_MACH_OCTEON = 0x008b0000 | (PF_MIPS_ID << PFLAGS_BIT) , LIEF::ELF::MIPS_MACH_XLR = 0x008c0000 | (PF_MIPS_ID << PFLAGS_BIT) , LIEF::ELF::MIPS_MACH_OCTEON2 = 0x008d0000 | (PF_MIPS_ID << PFLAGS_BIT) ,   LIEF::ELF::MIPS_MACH_OCTEON3 = 0x008e0000 | (PF_MIPS_ID << PFLAGS_BIT) , LIEF::ELF::MIPS_MACH_5400 = 0x00910000 | (PF_MIPS_ID << PFLAGS_BIT) , LIEF::ELF::MIPS_MACH_5900 = 0x00920000 | (PF_MIPS_ID << PFLAGS_BIT) , LIEF::ELF::MIPS_MACH_5500 = 0x00980000 | (PF_MIPS_ID << PFLAGS_BIT) ,   LIEF::ELF::MIPS_MACH_9000 = 0x00990000 | (PF_MIPS_ID << PFLAGS_BIT) , LIEF::ELF::MIPS_MACH_LS2E = 0x00a00000 | (PF_MIPS_ID << PFLAGS_BIT) , LIEF::ELF::MIPS_MACH_LS2F = 0x00a10000 | (PF_MIPS_ID << PFLAGS_BIT) , LIEF::ELF::MIPS_MACH_LS3A = 0x00a20000 | (PF_MIPS_ID << PFLAGS_BIT) ,   LIEF::ELF::MIPS_MICROMIPS = 0x02000000 | (PF_MIPS_ID << PFLAGS_BIT) , LIEF::ELF::MIPS_ARCH_ASE_M16 = 0x04000000 | (PF_MIPS_ID << PFLAGS_BIT) , LIEF::ELF::MIPS_ARCH_ASE_MDMX = 0x08000000 | (PF_MIPS_ID << PFLAGS_BIT) , LIEF::ELF::MIPS_ARCH_1 = 0x00000000 | (PF_MIPS_ID << PFLAGS_BIT) ,   LIEF::ELF::MIPS_ARCH_2 = 0x10000000 | (PF_MIPS_ID << PFLAGS_BIT) , LIEF::ELF::MIPS_ARCH_3 = 0x20000000 | (PF_MIPS_ID << PFLAGS_BIT) , LIEF::ELF::MIPS_ARCH_4 = 0x30000000 | (PF_MIPS_ID << PFLAGS_BIT) , LIEF::ELF::MIPS_ARCH_5 = 0x40000000 | (PF_MIPS_ID << PFLAGS_BIT) ,   LIEF::ELF::MIPS_ARCH_32 = 0x50000000 | (PF_MIPS_ID << PFLAGS_BIT) , LIEF::ELF::MIPS_ARCH_64 = 0x60000000 | (PF_MIPS_ID << PFLAGS_BIT) , LIEF::ELF::MIPS_ARCH_32R2 = 0x70000000 | (PF_MIPS_ID << PFLAGS_BIT) , LIEF::ELF::MIPS_ARCH_64R2 = 0x80000000 | (PF_MIPS_ID << PFLAGS_BIT) ,   LIEF::ELF::MIPS_ARCH_32R6 = 0x90000000 | (PF_MIPS_ID << PFLAGS_BIT) , LIEF::ELF::MIPS_ARCH_64R6 = 0xa0000000 | (PF_MIPS_ID << PFLAGS_BIT) , LIEF::ELF::RISCV_RVC = 0x00000001 | (PF_RISCV_ID << PFLAGS_BIT) , LIEF::ELF::RISCV_FLOAT_ABI_SOFT = 0x00000000 | (PF_RISCV_ID << PFLAGS_BIT) ,   LIEF::ELF::RISCV_FLOAT_ABI_SINGLE = 0x00000002 | (PF_RISCV_ID << PFLAGS_BIT) , LIEF::ELF::RISCV_FLOAT_ABI_DOUBLE = 0x00000004 | (PF_RISCV_ID << PFLAGS_BIT) , LIEF::ELF::RISCV_FLOAT_ABI_QUAD = 0x00000006 | (PF_RISCV_ID << PFLAGS_BIT) , LIEF::ELF::RISCV_FLOAT_ABI_RVE = 0x00000008 | (PF_RISCV_ID << PFLAGS_BIT) ,   LIEF::ELF::RISCV_FLOAT_ABI_TSO = 0x00000010 | (PF_RISCV_ID << PFLAGS_BIT) }

Functions
const char *	LIEF::ELF::to_string (PROCESSOR_FLAGS flag)