LIEF: Library to Instrument Executable Formats Version 2.0.0
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arm/registers.hpp
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1/* Copyright 2022 - 2026 R. Thomas
2 *
3 * Licensed under the Apache License, Version 2.0 (the "License");
4 * you may not use this file except in compliance with the License.
5 * You may obtain a copy of the License at
6 *
7 * http://www.apache.org/licenses/LICENSE-2.0
8 *
9 * Unless required by applicable law or agreed to in writing, software
10 * distributed under the License is distributed on an "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 * See the License for the specific language governing permissions and
13 * limitations under the License.
14 */
15#ifndef LIEF_ASM_ARM_REGISTER_H
16#define LIEF_ASM_ARM_REGISTER_H
17
18
19namespace LIEF::assembly::arm {
20enum class REG;
21const char* get_register_name(REG r);
22
23enum class REG {
24 NoRegister = 0,
25 APSR = 1,
27 CPSR = 3,
29 FPCXTS = 5,
30 FPEXC = 6,
31 FPINST = 7,
32 FPSCR = 8,
36 FPSID = 12,
37 ITSTATE = 13,
38 LR = 14,
39 PC = 15,
41 SP = 17,
42 SPSR = 18,
43 VPR = 19,
44 ZR = 20,
45 D0 = 21,
46 D1 = 22,
47 D2 = 23,
48 D3 = 24,
49 D4 = 25,
50 D5 = 26,
51 D6 = 27,
52 D7 = 28,
53 D8 = 29,
54 D9 = 30,
55 D10 = 31,
56 D11 = 32,
57 D12 = 33,
58 D13 = 34,
59 D14 = 35,
60 D15 = 36,
61 D16 = 37,
62 D17 = 38,
63 D18 = 39,
64 D19 = 40,
65 D20 = 41,
66 D21 = 42,
67 D22 = 43,
68 D23 = 44,
69 D24 = 45,
70 D25 = 46,
71 D26 = 47,
72 D27 = 48,
73 D28 = 49,
74 D29 = 50,
75 D30 = 51,
76 D31 = 52,
77 FPINST2 = 53,
78 MVFR0 = 54,
79 MVFR1 = 55,
80 MVFR2 = 56,
81 P0 = 57,
82 Q0 = 58,
83 Q1 = 59,
84 Q2 = 60,
85 Q3 = 61,
86 Q4 = 62,
87 Q5 = 63,
88 Q6 = 64,
89 Q7 = 65,
90 Q8 = 66,
91 Q9 = 67,
92 Q10 = 68,
93 Q11 = 69,
94 Q12 = 70,
95 Q13 = 71,
96 Q14 = 72,
97 Q15 = 73,
98 R0 = 74,
99 R1 = 75,
100 R2 = 76,
101 R3 = 77,
102 R4 = 78,
103 R5 = 79,
104 R6 = 80,
105 R7 = 81,
106 R8 = 82,
107 R9 = 83,
108 R10 = 84,
109 R11 = 85,
110 R12 = 86,
111 S0 = 87,
112 S1 = 88,
113 S2 = 89,
114 S3 = 90,
115 S4 = 91,
116 S5 = 92,
117 S6 = 93,
118 S7 = 94,
119 S8 = 95,
120 S9 = 96,
121 S10 = 97,
122 S11 = 98,
123 S12 = 99,
124 S13 = 100,
125 S14 = 101,
126 S15 = 102,
127 S16 = 103,
128 S17 = 104,
129 S18 = 105,
130 S19 = 106,
131 S20 = 107,
132 S21 = 108,
133 S22 = 109,
134 S23 = 110,
135 S24 = 111,
136 S25 = 112,
137 S26 = 113,
138 S27 = 114,
139 S28 = 115,
140 S29 = 116,
141 S30 = 117,
142 S31 = 118,
143 D0_D2 = 119,
144 D1_D3 = 120,
145 D2_D4 = 121,
146 D3_D5 = 122,
147 D4_D6 = 123,
148 D5_D7 = 124,
149 D6_D8 = 125,
150 D7_D9 = 126,
151 D8_D10 = 127,
152 D9_D11 = 128,
153 D10_D12 = 129,
154 D11_D13 = 130,
155 D12_D14 = 131,
156 D13_D15 = 132,
157 D14_D16 = 133,
158 D15_D17 = 134,
159 D16_D18 = 135,
160 D17_D19 = 136,
161 D18_D20 = 137,
162 D19_D21 = 138,
163 D20_D22 = 139,
164 D21_D23 = 140,
165 D22_D24 = 141,
166 D23_D25 = 142,
167 D24_D26 = 143,
168 D25_D27 = 144,
169 D26_D28 = 145,
170 D27_D29 = 146,
171 D28_D30 = 147,
172 D29_D31 = 148,
173 Q0_Q1 = 149,
174 Q1_Q2 = 150,
175 Q2_Q3 = 151,
176 Q3_Q4 = 152,
177 Q4_Q5 = 153,
178 Q5_Q6 = 154,
179 Q6_Q7 = 155,
180 Q7_Q8 = 156,
181 Q8_Q9 = 157,
182 Q9_Q10 = 158,
183 Q10_Q11 = 159,
184 Q11_Q12 = 160,
185 Q12_Q13 = 161,
186 Q13_Q14 = 162,
187 Q14_Q15 = 163,
188 Q0_Q1_Q2_Q3 = 164,
189 Q1_Q2_Q3_Q4 = 165,
190 Q2_Q3_Q4_Q5 = 166,
191 Q3_Q4_Q5_Q6 = 167,
192 Q4_Q5_Q6_Q7 = 168,
193 Q5_Q6_Q7_Q8 = 169,
194 Q6_Q7_Q8_Q9 = 170,
195 Q7_Q8_Q9_Q10 = 171,
196 Q8_Q9_Q10_Q11 = 172,
197 Q9_Q10_Q11_Q12 = 173,
198 Q10_Q11_Q12_Q13 = 174,
199 Q11_Q12_Q13_Q14 = 175,
200 Q12_Q13_Q14_Q15 = 176,
201 R0_R1 = 177,
202 R2_R3 = 178,
203 R4_R5 = 179,
204 R6_R7 = 180,
205 R8_R9 = 181,
206 R10_R11 = 182,
207 R12_SP = 183,
208 D0_D1_D2 = 184,
209 D1_D2_D3 = 185,
210 D2_D3_D4 = 186,
211 D3_D4_D5 = 187,
212 D4_D5_D6 = 188,
213 D5_D6_D7 = 189,
214 D6_D7_D8 = 190,
215 D7_D8_D9 = 191,
216 D8_D9_D10 = 192,
217 D9_D10_D11 = 193,
218 D10_D11_D12 = 194,
219 D11_D12_D13 = 195,
220 D12_D13_D14 = 196,
221 D13_D14_D15 = 197,
222 D14_D15_D16 = 198,
223 D15_D16_D17 = 199,
224 D16_D17_D18 = 200,
225 D17_D18_D19 = 201,
226 D18_D19_D20 = 202,
227 D19_D20_D21 = 203,
228 D20_D21_D22 = 204,
229 D21_D22_D23 = 205,
230 D22_D23_D24 = 206,
231 D23_D24_D25 = 207,
232 D24_D25_D26 = 208,
233 D25_D26_D27 = 209,
234 D26_D27_D28 = 210,
235 D27_D28_D29 = 211,
236 D28_D29_D30 = 212,
237 D29_D30_D31 = 213,
238 D0_D2_D4 = 214,
239 D1_D3_D5 = 215,
240 D2_D4_D6 = 216,
241 D3_D5_D7 = 217,
242 D4_D6_D8 = 218,
243 D5_D7_D9 = 219,
292 D1_D2 = 268,
293 D3_D4 = 269,
294 D5_D6 = 270,
295 D7_D8 = 271,
296 D9_D10 = 272,
297 D11_D12 = 273,
298 D13_D14 = 274,
299 D15_D16 = 275,
300 D17_D18 = 276,
301 D19_D20 = 277,
302 D21_D22 = 278,
303 D23_D24 = 279,
304 D25_D26 = 280,
305 D27_D28 = 281,
306 D29_D30 = 282,
307 D1_D2_D3_D4 = 283,
308 D3_D4_D5_D6 = 284,
309 D5_D6_D7_D8 = 285,
310 D7_D8_D9_D10 = 286,
311 D9_D10_D11_D12 = 287,
312 D11_D12_D13_D14 = 288,
313 D13_D14_D15_D16 = 289,
314 D15_D16_D17_D18 = 290,
315 D17_D18_D19_D20 = 291,
316 D19_D20_D21_D22 = 292,
317 D21_D22_D23_D24 = 293,
318 D23_D24_D25_D26 = 294,
319 D25_D26_D27_D28 = 295,
320 D27_D28_D29_D30 = 296,
321 NUM_TARGET_REGS = 297,
322};
323
324}
325
326
327#endif
ARM architecture-related namespace.
Definition arm/Instruction.hpp:24
const char * get_register_name(REG r)
REG
Definition arm/registers.hpp:23
@ D5_D7
Definition arm/registers.hpp:148
@ MVFR0
Definition arm/registers.hpp:78
@ D26_D28
Definition arm/registers.hpp:169
@ FPSID
Definition arm/registers.hpp:36
@ D16_D18_D20
Definition arm/registers.hpp:254
@ D0_D2
Definition arm/registers.hpp:143
@ D14_D16
Definition arm/registers.hpp:157
@ D16_D18_D20_D22
Definition arm/registers.hpp:282
@ FPSCR_NZCV
Definition arm/registers.hpp:33
@ D8_D10_D12_D14
Definition arm/registers.hpp:274
@ D11_D13
Definition arm/registers.hpp:154
@ D25_D27
Definition arm/registers.hpp:168
@ D13_D15_D17
Definition arm/registers.hpp:251
@ R12
Definition arm/registers.hpp:110
@ D24_D26
Definition arm/registers.hpp:167
@ APSR_NZCV
Definition arm/registers.hpp:26
@ D17_D19_D21_D23
Definition arm/registers.hpp:283
@ D19_D21
Definition arm/registers.hpp:162
@ R0
Definition arm/registers.hpp:98
@ D7_D9_D11
Definition arm/registers.hpp:245
@ ITSTATE
Definition arm/registers.hpp:37
@ CPSR
Definition arm/registers.hpp:27
@ R10
Definition arm/registers.hpp:108
@ D22_D24_D26
Definition arm/registers.hpp:260
@ R12_SP
Definition arm/registers.hpp:207
@ D16_D18
Definition arm/registers.hpp:159
@ D22_D24
Definition arm/registers.hpp:165
@ FPINST
Definition arm/registers.hpp:31
@ D4_D6_D8
Definition arm/registers.hpp:242
@ D0_D2_D4_D6
Definition arm/registers.hpp:266
@ D19_D21_D23
Definition arm/registers.hpp:257
@ D14_D16_D18_D20
Definition arm/registers.hpp:280
@ D7_D9_D11_D13
Definition arm/registers.hpp:273
@ R6_R7
Definition arm/registers.hpp:204
@ FPSCR_NZCVQC
Definition arm/registers.hpp:34
@ SPSR
Definition arm/registers.hpp:42
@ D5_D7_D9
Definition arm/registers.hpp:243
@ D4_D6
Definition arm/registers.hpp:147
@ ZR
Definition arm/registers.hpp:44
@ RA_AUTH_CODE
Definition arm/registers.hpp:40
@ D2_D4
Definition arm/registers.hpp:145
@ D6_D8_D10_D12
Definition arm/registers.hpp:272
@ R2_R3
Definition arm/registers.hpp:202
@ D23_D25
Definition arm/registers.hpp:166
@ D12_D14_D16
Definition arm/registers.hpp:250
@ D7_D9
Definition arm/registers.hpp:150
@ R3
Definition arm/registers.hpp:101
@ D10_D12_D14_D16
Definition arm/registers.hpp:276
@ D13_D15_D17_D19
Definition arm/registers.hpp:279
@ D8_D10_D12
Definition arm/registers.hpp:246
@ D3_D5_D7_D9
Definition arm/registers.hpp:269
@ D6_D8_D10
Definition arm/registers.hpp:244
@ R8_R9
Definition arm/registers.hpp:205
@ D21_D23_D25_D27
Definition arm/registers.hpp:287
@ D17_D19
Definition arm/registers.hpp:160
@ D28_D30
Definition arm/registers.hpp:171
@ D10_D12
Definition arm/registers.hpp:153
@ D20_D22_D24
Definition arm/registers.hpp:258
@ D9_D11_D13_D15
Definition arm/registers.hpp:275
@ FPSCR_RM
Definition arm/registers.hpp:35
@ R11
Definition arm/registers.hpp:109
@ FPCXTNS
Definition arm/registers.hpp:28
@ R4
Definition arm/registers.hpp:102
@ PC
Definition arm/registers.hpp:39
@ D4_D6_D8_D10
Definition arm/registers.hpp:270
@ FPCXTS
Definition arm/registers.hpp:29
@ R2
Definition arm/registers.hpp:100
@ D23_D25_D27_D29
Definition arm/registers.hpp:289
@ R9
Definition arm/registers.hpp:107
@ D8_D10
Definition arm/registers.hpp:151
@ D15_D17_D19
Definition arm/registers.hpp:253
@ D18_D20_D22
Definition arm/registers.hpp:256
@ D12_D14
Definition arm/registers.hpp:155
@ D23_D25_D27
Definition arm/registers.hpp:261
@ VPR
Definition arm/registers.hpp:43
@ D27_D29_D31
Definition arm/registers.hpp:265
@ D0_D2_D4
Definition arm/registers.hpp:238
@ R4_R5
Definition arm/registers.hpp:203
@ D21_D23
Definition arm/registers.hpp:164
@ D6_D8
Definition arm/registers.hpp:149
@ D20_D22
Definition arm/registers.hpp:163
@ MVFR1
Definition arm/registers.hpp:79
@ D29_D31
Definition arm/registers.hpp:172
@ D17_D19_D21
Definition arm/registers.hpp:255
@ D1_D3_D5_D7
Definition arm/registers.hpp:267
@ D25_D27_D29
Definition arm/registers.hpp:263
@ D24_D26_D28_D30
Definition arm/registers.hpp:290
@ D3_D5_D7
Definition arm/registers.hpp:241
@ R10_R11
Definition arm/registers.hpp:206
@ D9_D11_D13
Definition arm/registers.hpp:247
@ D11_D13_D15_D17
Definition arm/registers.hpp:277
@ R7
Definition arm/registers.hpp:105
@ D26_D28_D30
Definition arm/registers.hpp:264
@ R0_R1
Definition arm/registers.hpp:201
@ D1_D3_D5
Definition arm/registers.hpp:239
@ D14_D16_D18
Definition arm/registers.hpp:252
@ D22_D24_D26_D28
Definition arm/registers.hpp:288
@ D15_D17_D19_D21
Definition arm/registers.hpp:281
@ MVFR2
Definition arm/registers.hpp:80
@ D19_D21_D23_D25
Definition arm/registers.hpp:285
@ FPSCR
Definition arm/registers.hpp:32
@ D15_D17
Definition arm/registers.hpp:158
@ R1
Definition arm/registers.hpp:99
@ D25_D27_D29_D31
Definition arm/registers.hpp:291
@ R8
Definition arm/registers.hpp:106
@ D3_D5
Definition arm/registers.hpp:146
@ FPINST2
Definition arm/registers.hpp:77
@ D1_D3
Definition arm/registers.hpp:144
@ D21_D23_D25
Definition arm/registers.hpp:259
@ FPEXC
Definition arm/registers.hpp:30
@ D10_D12_D14
Definition arm/registers.hpp:248
@ R5
Definition arm/registers.hpp:103
@ D18_D20
Definition arm/registers.hpp:161
@ D11_D13_D15
Definition arm/registers.hpp:249
@ D2_D4_D6
Definition arm/registers.hpp:240
@ D27_D29
Definition arm/registers.hpp:170
@ D13_D15
Definition arm/registers.hpp:156
@ D20_D22_D24_D26
Definition arm/registers.hpp:286
@ D24_D26_D28
Definition arm/registers.hpp:262
@ R6
Definition arm/registers.hpp:104
@ D5_D7_D9_D11
Definition arm/registers.hpp:271
@ D2_D4_D6_D8
Definition arm/registers.hpp:268
@ D9_D11
Definition arm/registers.hpp:152
@ D18_D20_D22_D24
Definition arm/registers.hpp:284
@ D12_D14_D16_D18
Definition arm/registers.hpp:278
@ APSR
Definition arm/registers.hpp:25