RISC-V¶
Instruction¶
- class Instruction : public LIEF::assembly::Instruction¶
This class represents a RISC-V (32 or 64 bit) instruction.
Public Types
- using operands_it = iterator_range<Operand::Iterator>¶
Public Functions
- OPCODE opcode() const¶
The instruction opcode as defined in LLVM.
- operands_it operands() const¶
Iterator over the operands of the current instruction.
- virtual ~Instruction() override = default¶
Public Static Functions
- static bool classof(const assembly::Instruction *inst)¶
True if
instis an effective instance of riscv::Instruction.
- using operands_it = iterator_range<Operand::Iterator>¶
Opcodes¶
See LIEF::assembly::riscv::OPCODE in include/asm/riscv/opcodes.hpp
Operands¶
- class Operand¶
This class represents an operand for a RISC-V instruction.
Subclassed by LIEF::assembly::riscv::operands::Immediate, LIEF::assembly::riscv::operands::Memory, LIEF::assembly::riscv::operands::PCRelative, LIEF::assembly::riscv::operands::Register
Public Functions
- std::string to_string() const¶
Pretty representation of the operand.
- template<class T>
inline const T *as() const¶ This function can be used to down cast an Operand instance:
std::unique_ptr<assembly::riscv::Operand> op = ...; if (const auto* imm = inst->as<assembly::riscv::operands::Immediate>()) { const int64_t value = imm->value(); }
- virtual ~Operand()¶
- std::string to_string() const¶
Immediate¶
Register¶
- class Register : public LIEF::assembly::riscv::Operand¶
This class represents a register operand.
RISC-V exposes two kinds of registers: regular registers (GPR, FPR, vector, …) and control and status registers (CSR / system registers).
csrr a0, mstatus | | +------+ +-------+ | | v v REG SYSREGPublic Functions
- ~Register() override = default¶
- ~Register() override = default¶