AArch64

Instruction

Inheritance diagram of lief._lief.assembly.aarch64.Instruction
class lief.assembly.aarch64.Instruction

Bases: Instruction

This class represents an AArch64 instruction

property opcode lief.assembly.aarch64.OPCODE

The instruction opcode as defined in LLVM

property operands Iterator[lief.assembly.aarch64.Operand | None]

Iterator over the operands of the current instruction

Opcodes

See: lief.assembly.aarch64.OPCODE

Operands

Inheritance diagram of lief._lief.assembly.aarch64.Operand, lief._lief.assembly.aarch64.operands.Register, lief._lief.assembly.aarch64.operands.Immediate, lief._lief.assembly.aarch64.operands.PCRelative, lief._lief.assembly.aarch64.operands.Memory
class lief.assembly.aarch64.Operand

Bases: object

This class represents an operand for an AArch64 instruction

property to_string str

Pretty representation of the operand

Immediate

Inheritance diagram of lief._lief.assembly.aarch64.operands.Immediate
class lief.assembly.aarch64.operands.Immediate

Bases: Operand

This class represents an immediate operand (i.e. a constant) For instance:

mov x0, #8;
         |
         +---> Immediate(8)
property value int

The constant value wrapped by this operand

Register

Inheritance diagram of lief._lief.assembly.aarch64.operands.Register
class lief.assembly.aarch64.operands.Register

Bases: Operand

This class represents a register operand.

mrs     x0, TPIDR_EL0
        |   |
 +------+   +-------+
 |                  |
 v                  v
 REG              SYSREG
property value lief.assembly.aarch64.REG | lief.assembly.aarch64.SYSREG | None

The effective register as either: a lief.assembly.aarch64.REG or a lief.assembly.aarch64.SYSREG.

Memory

Inheritance diagram of lief._lief.assembly.aarch64.operands.Memory
class lief.assembly.aarch64.operands.Memory

Bases: Operand

This class represents a memory operand.

ldr     x0, [x1, x2, lsl #3]
             |   |    |
+------------+   |    +--------+
|                |             |
v                v             v
Base            Reg Offset    Shift
class SHIFT(value, names=None, *, module=None, qualname=None, type=None, start=1, boundary=None)

Bases: Enum

LSL = 1
SXTW = 5
SXTX = 4
UNKNOWN = 0
UXTW = 3
UXTX = 2
property base lief.assembly.aarch64.REG

The base register.

For str x3, [x8, #8] it would return x8.

property offset lief.assembly.aarch64.REG | int | None

The addressing offset.

It can be either:

  • A register (e.g. ldr x0, [x1, x3])

  • An offset (e.g. ldr x0, [x1, #8])

property shift lief.assembly.aarch64.operands.Memory.shift_info_t

Shift information.

For instance, for ldr x1, [x2, x3, lsl #3] it would return a LSL with a value set to 3.

class shift_info_t

Bases: object

This structure holds shift info (type + value)

property type lief.assembly.aarch64.operands.Memory.SHIFT
property value int

PCRelative

Inheritance diagram of lief._lief.assembly.aarch64.operands.PCRelative
class lief.assembly.aarch64.operands.PCRelative

Bases: Operand

This class represents a PC-relative operand.

ldr x0, #8
        |
        v
 PC Relative operand
property value int

The effective value that is relative to the current pc register