LIEF::assembly::riscv::Instruction Class Reference
This class represents a RISC-V (32 or 64 bit) instruction. More...
#include <Instruction.hpp>
Inheritance diagram for LIEF::assembly::riscv::Instruction:
Collaboration diagram for LIEF::assembly::riscv::Instruction:
Public Member Functions | |
| OPCODE | opcode () const |
| The instruction opcode as defined in LLVM. | |
| ~Instruction () override=default | |
| Public Member Functions inherited from LIEF::assembly::Instruction | |
| uint64_t | address () const |
| Address of the instruction. | |
| size_t | size () const |
| Size of the instruction in bytes. | |
| const std::vector< uint8_t > & | raw () const |
| Raw bytes of the current instruction. | |
| std::string | mnemonic () const |
| Instruction mnemonic (e.g. br). | |
| std::string | to_string (bool with_address=true) const |
| Representation of the current instruction in a pretty assembly way. | |
| bool | is_call () const |
| True if the instruction is a call. | |
| bool | is_terminator () const |
| True if the instruction marks the end of a basic block. | |
| bool | is_branch () const |
| True if the instruction is a branch. | |
| bool | is_syscall () const |
| True if the instruction is a syscall. | |
| bool | is_memory_access () const |
| True if the instruction performs a memory access. | |
| bool | is_move_reg () const |
| True if the instruction is a register to register move. | |
| bool | is_add () const |
| True if the instruction performs an arithmetic addition. | |
| bool | is_trap () const |
| True if the instruction is a trap. | |
| bool | is_barrier () const |
| True if the instruction prevents executing the instruction that immediatly follows the current. This includes return or unconditional branch instructions. | |
| bool | is_return () const |
| True if the instruction is a return. | |
| bool | is_indirect_branch () const |
| True if the instruction is and indirect branch. | |
| bool | is_conditional_branch () const |
| True if the instruction is conditionally jumping to the next instruction or an instruction into some other basic block. | |
| bool | is_unconditional_branch () const |
| True if the instruction is jumping (unconditionally) to some other basic block. | |
| bool | is_compare () const |
| True if the instruction is a comparison. | |
| bool | is_move_immediate () const |
| True if the instruction is moving an immediate. | |
| bool | is_bitcast () const |
| True if the instruction is doing a bitcast. | |
| MemoryAccess | memory_access () const |
| Memory access flags. | |
| result< uint64_t > | branch_target () const |
| Given a is_branch() instruction, try to evaluate the address of the destination. | |
| const llvm::MCInst & | mcinst () const |
| Return the underlying llvm::MCInst implementation. | |
| template<class T> | |
| const T * | as () const |
| This function can be used to down cast an Instruction instance: | |
Static Public Member Functions | |
| static bool | classof (const assembly::Instruction *inst) |
| True if inst is an effective instance of riscv::Instruction. | |
Additional Inherited Members | |
| Public Types inherited from LIEF::assembly::Instruction | |
| enum class | MemoryAccess : uint8_t { NONE = 0 , READ = 1 << 0 , WRITE = 1 << 1 , READ_WRITE = READ | WRITE } |
| Memory operation flags. More... | |
Detailed Description
This class represents a RISC-V (32 or 64 bit) instruction.
Constructor & Destructor Documentation
◆ ~Instruction()
|
overridevirtualdefault |
Reimplemented from LIEF::assembly::Instruction.
Member Function Documentation
◆ classof()
|
static |
True if inst is an effective instance of riscv::Instruction.
◆ opcode()
| OPCODE LIEF::assembly::riscv::Instruction::opcode | ( | ) | const |
The instruction opcode as defined in LLVM.
The documentation for this class was generated from the following file:
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