latest/doxygen/riscv_2registers_8hpp_source.html

/* Copyright 2022 - 2025 R. Thomas

 *

 * Licensed under the Apache License, Version 2.0 (the "License");

 * you may not use this file except in compliance with the License.

 * You may obtain a copy of the License at

 *

 *     http://www.apache.org/licenses/LICENSE-2.0

 *

 * Unless required by applicable law or agreed to in writing, software

 * distributed under the License is distributed on an "AS IS" BASIS,

 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

 * See the License for the specific language governing permissions and

 * limitations under the License.

 */

#ifndef LIEF_ASM_RISCV_REGISTER_H

#define LIEF_ASM_RISCV_REGISTER_H

namespace LIEF {

namespace assembly {

namespace riscv {

enum class REG;

const char* get_register_name(REG r);


enum class REG {

  NoRegister = 0,

  FFLAGS = 1,

  FRM = 2,

  SF_VCIX_STATE = 3,

  SSP = 4,

  VL = 5,

  VLENB = 6,

  VTYPE = 7,

  VXRM = 8,

  VXSAT = 9,

  DUMMY_REG_PAIR_WITH_X0 = 10,

  V0 = 11,

  V1 = 12,

  V2 = 13,

  V3 = 14,

  V4 = 15,

  V5 = 16,

  V6 = 17,

  V7 = 18,

  V8 = 19,

  V9 = 20,

  V10 = 21,

  V11 = 22,

  V12 = 23,

  V13 = 24,

  V14 = 25,

  V15 = 26,

  V16 = 27,

  V17 = 28,

  V18 = 29,

  V19 = 30,

  V20 = 31,

  V21 = 32,

  V22 = 33,

  V23 = 34,

  V24 = 35,

  V25 = 36,

  V26 = 37,

  V27 = 38,

  V28 = 39,

  V29 = 40,

  V30 = 41,

  V31 = 42,

  X0 = 43,

  X1 = 44,

  X2 = 45,

  X3 = 46,

  X4 = 47,

  X5 = 48,

  X6 = 49,

  X7 = 50,

  X8 = 51,

  X9 = 52,

  X10 = 53,

  X11 = 54,

  X12 = 55,

  X13 = 56,

  X14 = 57,

  X15 = 58,

  X16 = 59,

  X17 = 60,

  X18 = 61,

  X19 = 62,

  X20 = 63,

  X21 = 64,

  X22 = 65,

  X23 = 66,

  X24 = 67,

  X25 = 68,

  X26 = 69,

  X27 = 70,

  X28 = 71,

  X29 = 72,

  X30 = 73,

  X31 = 74,

  F0_D = 75,

  F1_D = 76,

  F2_D = 77,

  F3_D = 78,

  F4_D = 79,

  F5_D = 80,

  F6_D = 81,

  F7_D = 82,

  F8_D = 83,

  F9_D = 84,

  F10_D = 85,

  F11_D = 86,

  F12_D = 87,

  F13_D = 88,

  F14_D = 89,

  F15_D = 90,

  F16_D = 91,

  F17_D = 92,

  F18_D = 93,

  F19_D = 94,

  F20_D = 95,

  F21_D = 96,

  F22_D = 97,

  F23_D = 98,

  F24_D = 99,

  F25_D = 100,

  F26_D = 101,

  F27_D = 102,

  F28_D = 103,

  F29_D = 104,

  F30_D = 105,

  F31_D = 106,

  F0_F = 107,

  F1_F = 108,

  F2_F = 109,

  F3_F = 110,

  F4_F = 111,

  F5_F = 112,

  F6_F = 113,

  F7_F = 114,

  F8_F = 115,

  F9_F = 116,

  F10_F = 117,

  F11_F = 118,

  F12_F = 119,

  F13_F = 120,

  F14_F = 121,

  F15_F = 122,

  F16_F = 123,

  F17_F = 124,

  F18_F = 125,

  F19_F = 126,

  F20_F = 127,

  F21_F = 128,

  F22_F = 129,

  F23_F = 130,

  F24_F = 131,

  F25_F = 132,

  F26_F = 133,

  F27_F = 134,

  F28_F = 135,

  F29_F = 136,

  F30_F = 137,

  F31_F = 138,

  F0_H = 139,

  F1_H = 140,

  F2_H = 141,

  F3_H = 142,

  F4_H = 143,

  F5_H = 144,

  F6_H = 145,

  F7_H = 146,

  F8_H = 147,

  F9_H = 148,

  F10_H = 149,

  F11_H = 150,

  F12_H = 151,

  F13_H = 152,

  F14_H = 153,

  F15_H = 154,

  F16_H = 155,

  F17_H = 156,

  F18_H = 157,

  F19_H = 158,

  F20_H = 159,

  F21_H = 160,

  F22_H = 161,

  F23_H = 162,

  F24_H = 163,

  F25_H = 164,

  F26_H = 165,

  F27_H = 166,

  F28_H = 167,

  F29_H = 168,

  F30_H = 169,

  F31_H = 170,

  X0_H = 171,

  X1_H = 172,

  X2_H = 173,

  X3_H = 174,

  X4_H = 175,

  X5_H = 176,

  X6_H = 177,

  X7_H = 178,

  X8_H = 179,

  X9_H = 180,

  X10_H = 181,

  X11_H = 182,

  X12_H = 183,

  X13_H = 184,

  X14_H = 185,

  X15_H = 186,

  X16_H = 187,

  X17_H = 188,

  X18_H = 189,

  X19_H = 190,

  X20_H = 191,

  X21_H = 192,

  X22_H = 193,

  X23_H = 194,

  X24_H = 195,

  X25_H = 196,

  X26_H = 197,

  X27_H = 198,

  X28_H = 199,

  X29_H = 200,

  X30_H = 201,

  X31_H = 202,

  X0_Pair = 203,

  X0_W = 204,

  X1_W = 205,

  X2_W = 206,

  X3_W = 207,

  X4_W = 208,

  X5_W = 209,

  X6_W = 210,

  X7_W = 211,

  X8_W = 212,

  X9_W = 213,

  X10_W = 214,

  X11_W = 215,

  X12_W = 216,

  X13_W = 217,

  X14_W = 218,

  X15_W = 219,

  X16_W = 220,

  X17_W = 221,

  X18_W = 222,

  X19_W = 223,

  X20_W = 224,

  X21_W = 225,

  X22_W = 226,

  X23_W = 227,

  X24_W = 228,

  X25_W = 229,

  X26_W = 230,

  X27_W = 231,

  X28_W = 232,

  X29_W = 233,

  X30_W = 234,

  X31_W = 235,

  V0M2 = 236,

  V0M4 = 237,

  V0M8 = 238,

  V2M2 = 239,

  V4M2 = 240,

  V4M4 = 241,

  V6M2 = 242,

  V8M2 = 243,

  V8M4 = 244,

  V8M8 = 245,

  V10M2 = 246,

  V12M2 = 247,

  V12M4 = 248,

  V14M2 = 249,

  V16M2 = 250,

  V16M4 = 251,

  V16M8 = 252,

  V18M2 = 253,

  V20M2 = 254,

  V20M4 = 255,

  V22M2 = 256,

  V24M2 = 257,

  V24M4 = 258,

  V24M8 = 259,

  V26M2 = 260,

  V28M2 = 261,

  V28M4 = 262,

  V30M2 = 263,

  X2_X3 = 264,

  X4_X5 = 265,

  X6_X7 = 266,

  X8_X9 = 267,

  X10_X11 = 268,

  X12_X13 = 269,

  X14_X15 = 270,

  X16_X17 = 271,

  X18_X19 = 272,

  X20_X21 = 273,

  X22_X23 = 274,

  X24_X25 = 275,

  X26_X27 = 276,

  X28_X29 = 277,

  X30_X31 = 278,

  V1_V2 = 279,

  V2_V3 = 280,

  V3_V4 = 281,

  V4_V5 = 282,

  V5_V6 = 283,

  V6_V7 = 284,

  V7_V8 = 285,

  V8_V9 = 286,

  V9_V10 = 287,

  V10_V11 = 288,

  V11_V12 = 289,

  V12_V13 = 290,

  V13_V14 = 291,

  V14_V15 = 292,

  V15_V16 = 293,

  V16_V17 = 294,

  V17_V18 = 295,

  V18_V19 = 296,

  V19_V20 = 297,

  V20_V21 = 298,

  V21_V22 = 299,

  V22_V23 = 300,

  V23_V24 = 301,

  V24_V25 = 302,

  V25_V26 = 303,

  V26_V27 = 304,

  V27_V28 = 305,

  V28_V29 = 306,

  V29_V30 = 307,

  V30_V31 = 308,

  V0_V1 = 309,

  V2M2_V4M2 = 310,

  V4M2_V6M2 = 311,

  V6M2_V8M2 = 312,

  V8M2_V10M2 = 313,

  V10M2_V12M2 = 314,

  V12M2_V14M2 = 315,

  V14M2_V16M2 = 316,

  V16M2_V18M2 = 317,

  V18M2_V20M2 = 318,

  V20M2_V22M2 = 319,

  V22M2_V24M2 = 320,

  V24M2_V26M2 = 321,

  V26M2_V28M2 = 322,

  V28M2_V30M2 = 323,

  V0M2_V2M2 = 324,

  V4M4_V8M4 = 325,

  V8M4_V12M4 = 326,

  V12M4_V16M4 = 327,

  V16M4_V20M4 = 328,

  V20M4_V24M4 = 329,

  V24M4_V28M4 = 330,

  V0M4_V4M4 = 331,

  V1_V2_V3 = 332,

  V2_V3_V4 = 333,

  V3_V4_V5 = 334,

  V4_V5_V6 = 335,

  V5_V6_V7 = 336,

  V6_V7_V8 = 337,

  V7_V8_V9 = 338,

  V8_V9_V10 = 339,

  V9_V10_V11 = 340,

  V10_V11_V12 = 341,

  V11_V12_V13 = 342,

  V12_V13_V14 = 343,

  V13_V14_V15 = 344,

  V14_V15_V16 = 345,

  V15_V16_V17 = 346,

  V16_V17_V18 = 347,

  V17_V18_V19 = 348,

  V18_V19_V20 = 349,

  V19_V20_V21 = 350,

  V20_V21_V22 = 351,

  V21_V22_V23 = 352,

  V22_V23_V24 = 353,

  V23_V24_V25 = 354,

  V24_V25_V26 = 355,

  V25_V26_V27 = 356,

  V26_V27_V28 = 357,

  V27_V28_V29 = 358,

  V28_V29_V30 = 359,

  V29_V30_V31 = 360,

  V0_V1_V2 = 361,

  V2M2_V4M2_V6M2 = 362,

  V4M2_V6M2_V8M2 = 363,

  V6M2_V8M2_V10M2 = 364,

  V8M2_V10M2_V12M2 = 365,

  V10M2_V12M2_V14M2 = 366,

  V12M2_V14M2_V16M2 = 367,

  V14M2_V16M2_V18M2 = 368,

  V16M2_V18M2_V20M2 = 369,

  V18M2_V20M2_V22M2 = 370,

  V20M2_V22M2_V24M2 = 371,

  V22M2_V24M2_V26M2 = 372,

  V24M2_V26M2_V28M2 = 373,

  V26M2_V28M2_V30M2 = 374,

  V0M2_V2M2_V4M2 = 375,

  V1_V2_V3_V4 = 376,

  V2_V3_V4_V5 = 377,

  V3_V4_V5_V6 = 378,

  V4_V5_V6_V7 = 379,

  V5_V6_V7_V8 = 380,

  V6_V7_V8_V9 = 381,

  V7_V8_V9_V10 = 382,

  V8_V9_V10_V11 = 383,

  V9_V10_V11_V12 = 384,

  V10_V11_V12_V13 = 385,

  V11_V12_V13_V14 = 386,

  V12_V13_V14_V15 = 387,

  V13_V14_V15_V16 = 388,

  V14_V15_V16_V17 = 389,

  V15_V16_V17_V18 = 390,

  V16_V17_V18_V19 = 391,

  V17_V18_V19_V20 = 392,

  V18_V19_V20_V21 = 393,

  V19_V20_V21_V22 = 394,

  V20_V21_V22_V23 = 395,

  V21_V22_V23_V24 = 396,

  V22_V23_V24_V25 = 397,

  V23_V24_V25_V26 = 398,

  V24_V25_V26_V27 = 399,

  V25_V26_V27_V28 = 400,

  V26_V27_V28_V29 = 401,

  V27_V28_V29_V30 = 402,

  V28_V29_V30_V31 = 403,

  V0_V1_V2_V3 = 404,

  V2M2_V4M2_V6M2_V8M2 = 405,

  V4M2_V6M2_V8M2_V10M2 = 406,

  V6M2_V8M2_V10M2_V12M2 = 407,

  V8M2_V10M2_V12M2_V14M2 = 408,

  V10M2_V12M2_V14M2_V16M2 = 409,

  V12M2_V14M2_V16M2_V18M2 = 410,

  V14M2_V16M2_V18M2_V20M2 = 411,

  V16M2_V18M2_V20M2_V22M2 = 412,

  V18M2_V20M2_V22M2_V24M2 = 413,

  V20M2_V22M2_V24M2_V26M2 = 414,

  V22M2_V24M2_V26M2_V28M2 = 415,

  V24M2_V26M2_V28M2_V30M2 = 416,

  V0M2_V2M2_V4M2_V6M2 = 417,

  V1_V2_V3_V4_V5 = 418,

  V2_V3_V4_V5_V6 = 419,

  V3_V4_V5_V6_V7 = 420,

  V4_V5_V6_V7_V8 = 421,

  V5_V6_V7_V8_V9 = 422,

  V6_V7_V8_V9_V10 = 423,

  V7_V8_V9_V10_V11 = 424,

  V8_V9_V10_V11_V12 = 425,

  V9_V10_V11_V12_V13 = 426,

  V10_V11_V12_V13_V14 = 427,

  V11_V12_V13_V14_V15 = 428,

  V12_V13_V14_V15_V16 = 429,

  V13_V14_V15_V16_V17 = 430,

  V14_V15_V16_V17_V18 = 431,

  V15_V16_V17_V18_V19 = 432,

  V16_V17_V18_V19_V20 = 433,

  V17_V18_V19_V20_V21 = 434,

  V18_V19_V20_V21_V22 = 435,

  V19_V20_V21_V22_V23 = 436,

  V20_V21_V22_V23_V24 = 437,

  V21_V22_V23_V24_V25 = 438,

  V22_V23_V24_V25_V26 = 439,

  V23_V24_V25_V26_V27 = 440,

  V24_V25_V26_V27_V28 = 441,

  V25_V26_V27_V28_V29 = 442,

  V26_V27_V28_V29_V30 = 443,

  V27_V28_V29_V30_V31 = 444,

  V0_V1_V2_V3_V4 = 445,

  V1_V2_V3_V4_V5_V6 = 446,

  V2_V3_V4_V5_V6_V7 = 447,

  V3_V4_V5_V6_V7_V8 = 448,

  V4_V5_V6_V7_V8_V9 = 449,

  V5_V6_V7_V8_V9_V10 = 450,

  V6_V7_V8_V9_V10_V11 = 451,

  V7_V8_V9_V10_V11_V12 = 452,

  V8_V9_V10_V11_V12_V13 = 453,

  V9_V10_V11_V12_V13_V14 = 454,

  V10_V11_V12_V13_V14_V15 = 455,

  V11_V12_V13_V14_V15_V16 = 456,

  V12_V13_V14_V15_V16_V17 = 457,

  V13_V14_V15_V16_V17_V18 = 458,

  V14_V15_V16_V17_V18_V19 = 459,

  V15_V16_V17_V18_V19_V20 = 460,

  V16_V17_V18_V19_V20_V21 = 461,

  V17_V18_V19_V20_V21_V22 = 462,

  V18_V19_V20_V21_V22_V23 = 463,

  V19_V20_V21_V22_V23_V24 = 464,

  V20_V21_V22_V23_V24_V25 = 465,

  V21_V22_V23_V24_V25_V26 = 466,

  V22_V23_V24_V25_V26_V27 = 467,

  V23_V24_V25_V26_V27_V28 = 468,

  V24_V25_V26_V27_V28_V29 = 469,

  V25_V26_V27_V28_V29_V30 = 470,

  V26_V27_V28_V29_V30_V31 = 471,

  V0_V1_V2_V3_V4_V5 = 472,

  V1_V2_V3_V4_V5_V6_V7 = 473,

  V2_V3_V4_V5_V6_V7_V8 = 474,

  V3_V4_V5_V6_V7_V8_V9 = 475,

  V4_V5_V6_V7_V8_V9_V10 = 476,

  V5_V6_V7_V8_V9_V10_V11 = 477,

  V6_V7_V8_V9_V10_V11_V12 = 478,

  V7_V8_V9_V10_V11_V12_V13 = 479,

  V8_V9_V10_V11_V12_V13_V14 = 480,

  V9_V10_V11_V12_V13_V14_V15 = 481,

  V10_V11_V12_V13_V14_V15_V16 = 482,

  V11_V12_V13_V14_V15_V16_V17 = 483,

  V12_V13_V14_V15_V16_V17_V18 = 484,

  V13_V14_V15_V16_V17_V18_V19 = 485,

  V14_V15_V16_V17_V18_V19_V20 = 486,

  V15_V16_V17_V18_V19_V20_V21 = 487,

  V16_V17_V18_V19_V20_V21_V22 = 488,

  V17_V18_V19_V20_V21_V22_V23 = 489,

  V18_V19_V20_V21_V22_V23_V24 = 490,

  V19_V20_V21_V22_V23_V24_V25 = 491,

  V20_V21_V22_V23_V24_V25_V26 = 492,

  V21_V22_V23_V24_V25_V26_V27 = 493,

  V22_V23_V24_V25_V26_V27_V28 = 494,

  V23_V24_V25_V26_V27_V28_V29 = 495,

  V24_V25_V26_V27_V28_V29_V30 = 496,

  V25_V26_V27_V28_V29_V30_V31 = 497,

  V0_V1_V2_V3_V4_V5_V6 = 498,

  V1_V2_V3_V4_V5_V6_V7_V8 = 499,

  V2_V3_V4_V5_V6_V7_V8_V9 = 500,

  V3_V4_V5_V6_V7_V8_V9_V10 = 501,

  V4_V5_V6_V7_V8_V9_V10_V11 = 502,

  V5_V6_V7_V8_V9_V10_V11_V12 = 503,

  V6_V7_V8_V9_V10_V11_V12_V13 = 504,

  V7_V8_V9_V10_V11_V12_V13_V14 = 505,

  V8_V9_V10_V11_V12_V13_V14_V15 = 506,

  V9_V10_V11_V12_V13_V14_V15_V16 = 507,

  V10_V11_V12_V13_V14_V15_V16_V17 = 508,

  V11_V12_V13_V14_V15_V16_V17_V18 = 509,

  V12_V13_V14_V15_V16_V17_V18_V19 = 510,

  V13_V14_V15_V16_V17_V18_V19_V20 = 511,

  V14_V15_V16_V17_V18_V19_V20_V21 = 512,

  V15_V16_V17_V18_V19_V20_V21_V22 = 513,

  V16_V17_V18_V19_V20_V21_V22_V23 = 514,

  V17_V18_V19_V20_V21_V22_V23_V24 = 515,

  V18_V19_V20_V21_V22_V23_V24_V25 = 516,

  V19_V20_V21_V22_V23_V24_V25_V26 = 517,

  V20_V21_V22_V23_V24_V25_V26_V27 = 518,

  V21_V22_V23_V24_V25_V26_V27_V28 = 519,

  V22_V23_V24_V25_V26_V27_V28_V29 = 520,

  V23_V24_V25_V26_V27_V28_V29_V30 = 521,

  V24_V25_V26_V27_V28_V29_V30_V31 = 522,

  V0_V1_V2_V3_V4_V5_V6_V7 = 523,

  NUM_TARGET_REGS = 524,

};


}

}

}

#endif

LIEF::assembly::riscv
RISC-V architecture-related namespace.
Definition riscv/Instruction.hpp:26

LIEF::assembly::riscv::REG
REG
Definition riscv/registers.hpp:23

LIEF::assembly::riscv::REG::V24M2_V26M2_V28M2
@ V24M2_V26M2_V28M2
Definition riscv/registers.hpp:397

LIEF::assembly::riscv::REG::V12M4
@ V12M4
Definition riscv/registers.hpp:272

LIEF::assembly::riscv::REG::X2_H
@ X2_H
Definition riscv/registers.hpp:197

LIEF::assembly::riscv::REG::V16_V17_V18_V19_V20_V21_V22_V23
@ V16_V17_V18_V19_V20_V21_V22_V23
Definition riscv/registers.hpp:538

LIEF::assembly::riscv::REG::V9_V10
@ V9_V10
Definition riscv/registers.hpp:311

LIEF::assembly::riscv::REG::V17_V18_V19_V20_V21_V22_V23_V24
@ V17_V18_V19_V20_V21_V22_V23_V24
Definition riscv/registers.hpp:539

LIEF::assembly::riscv::REG::X30_W
@ X30_W
Definition riscv/registers.hpp:258

LIEF::assembly::riscv::REG::V7
@ V7
Definition riscv/registers.hpp:42

LIEF::assembly::riscv::REG::X9_H
@ X9_H
Definition riscv/registers.hpp:204

LIEF::assembly::riscv::REG::V18M2_V20M2
@ V18M2_V20M2
Definition riscv/registers.hpp:342

LIEF::assembly::riscv::REG::V3_V4
@ V3_V4
Definition riscv/registers.hpp:305

LIEF::assembly::riscv::REG::V2M2
@ V2M2
Definition riscv/registers.hpp:263

LIEF::assembly::riscv::REG::V5_V6_V7_V8_V9_V10
@ V5_V6_V7_V8_V9_V10
Definition riscv/registers.hpp:474

LIEF::assembly::riscv::REG::F13_F
@ F13_F
Definition riscv/registers.hpp:144

LIEF::assembly::riscv::REG::V20M2_V22M2
@ V20M2_V22M2
Definition riscv/registers.hpp:343

LIEF::assembly::riscv::REG::X3
@ X3
Definition riscv/registers.hpp:70

LIEF::assembly::riscv::REG::V18_V19
@ V18_V19
Definition riscv/registers.hpp:320

LIEF::assembly::riscv::REG::V28M2_V30M2
@ V28M2_V30M2
Definition riscv/registers.hpp:347

LIEF::assembly::riscv::REG::V14_V15_V16_V17_V18_V19
@ V14_V15_V16_V17_V18_V19
Definition riscv/registers.hpp:483

LIEF::assembly::riscv::REG::V3_V4_V5_V6_V7_V8
@ V3_V4_V5_V6_V7_V8
Definition riscv/registers.hpp:472

LIEF::assembly::riscv::REG::V0M4
@ V0M4
Definition riscv/registers.hpp:261

LIEF::assembly::riscv::REG::X19_W
@ X19_W
Definition riscv/registers.hpp:247

LIEF::assembly::riscv::REG::X3_H
@ X3_H
Definition riscv/registers.hpp:198

LIEF::assembly::riscv::REG::V18_V19_V20_V21_V22
@ V18_V19_V20_V21_V22
Definition riscv/registers.hpp:459

LIEF::assembly::riscv::REG::X30_H
@ X30_H
Definition riscv/registers.hpp:225

LIEF::assembly::riscv::REG::X0_W
@ X0_W
Definition riscv/registers.hpp:228

LIEF::assembly::riscv::REG::V16M2_V18M2_V20M2
@ V16M2_V18M2_V20M2
Definition riscv/registers.hpp:393

LIEF::assembly::riscv::REG::V16M2
@ V16M2
Definition riscv/registers.hpp:274

LIEF::assembly::riscv::REG::X2_X3
@ X2_X3
Definition riscv/registers.hpp:288

LIEF::assembly::riscv::REG::VXRM
@ VXRM
Definition riscv/registers.hpp:32

LIEF::assembly::riscv::REG::V22_V23_V24_V25_V26_V27
@ V22_V23_V24_V25_V26_V27
Definition riscv/registers.hpp:491

LIEF::assembly::riscv::REG::F6_F
@ F6_F
Definition riscv/registers.hpp:137

LIEF::assembly::riscv::REG::F11_D
@ F11_D
Definition riscv/registers.hpp:110

LIEF::assembly::riscv::REG::F16_F
@ F16_F
Definition riscv/registers.hpp:147

LIEF::assembly::riscv::REG::V24
@ V24
Definition riscv/registers.hpp:59

LIEF::assembly::riscv::REG::V24M2_V26M2
@ V24M2_V26M2
Definition riscv/registers.hpp:345

LIEF::assembly::riscv::REG::V14_V15_V16_V17
@ V14_V15_V16_V17
Definition riscv/registers.hpp:413

LIEF::assembly::riscv::REG::V23_V24_V25_V26_V27_V28_V29_V30
@ V23_V24_V25_V26_V27_V28_V29_V30
Definition riscv/registers.hpp:545

LIEF::assembly::riscv::REG::V28
@ V28
Definition riscv/registers.hpp:63

LIEF::assembly::riscv::REG::V18_V19_V20_V21_V22_V23
@ V18_V19_V20_V21_V22_V23
Definition riscv/registers.hpp:487

LIEF::assembly::riscv::REG::V11_V12_V13_V14_V15_V16_V17_V18
@ V11_V12_V13_V14_V15_V16_V17_V18
Definition riscv/registers.hpp:533

LIEF::assembly::riscv::REG::V7_V8_V9_V10_V11_V12_V13
@ V7_V8_V9_V10_V11_V12_V13
Definition riscv/registers.hpp:503

LIEF::assembly::riscv::REG::V23_V24_V25_V26_V27
@ V23_V24_V25_V26_V27
Definition riscv/registers.hpp:464

LIEF::assembly::riscv::REG::F3_F
@ F3_F
Definition riscv/registers.hpp:134

LIEF::assembly::riscv::REG::V26_V27
@ V26_V27
Definition riscv/registers.hpp:328

LIEF::assembly::riscv::REG::F14_D
@ F14_D
Definition riscv/registers.hpp:113

LIEF::assembly::riscv::REG::F9_F
@ F9_F
Definition riscv/registers.hpp:140

LIEF::assembly::riscv::REG::F2_H
@ F2_H
Definition riscv/registers.hpp:165

LIEF::assembly::riscv::REG::V0
@ V0
Definition riscv/registers.hpp:35

LIEF::assembly::riscv::REG::V18_V19_V20_V21_V22_V23_V24_V25
@ V18_V19_V20_V21_V22_V23_V24_V25
Definition riscv/registers.hpp:540

LIEF::assembly::riscv::REG::V14_V15
@ V14_V15
Definition riscv/registers.hpp:316

LIEF::assembly::riscv::REG::X26_H
@ X26_H
Definition riscv/registers.hpp:221

LIEF::assembly::riscv::REG::V2M2_V4M2_V6M2_V8M2
@ V2M2_V4M2_V6M2_V8M2
Definition riscv/registers.hpp:429

LIEF::assembly::riscv::REG::V18M2_V20M2_V22M2
@ V18M2_V20M2_V22M2
Definition riscv/registers.hpp:394

LIEF::assembly::riscv::REG::X9_W
@ X9_W
Definition riscv/registers.hpp:237

LIEF::assembly::riscv::REG::V4_V5_V6_V7_V8_V9_V10_V11
@ V4_V5_V6_V7_V8_V9_V10_V11
Definition riscv/registers.hpp:526

LIEF::assembly::riscv::REG::V16M2_V18M2
@ V16M2_V18M2
Definition riscv/registers.hpp:341

LIEF::assembly::riscv::REG::V24M4
@ V24M4
Definition riscv/registers.hpp:282

LIEF::assembly::riscv::REG::V28_V29_V30
@ V28_V29_V30
Definition riscv/registers.hpp:383

LIEF::assembly::riscv::REG::V12M4_V16M4
@ V12M4_V16M4
Definition riscv/registers.hpp:351

LIEF::assembly::riscv::REG::F11_H
@ F11_H
Definition riscv/registers.hpp:174

LIEF::assembly::riscv::REG::V3_V4_V5
@ V3_V4_V5
Definition riscv/registers.hpp:358

LIEF::assembly::riscv::REG::X28_X29
@ X28_X29
Definition riscv/registers.hpp:301

LIEF::assembly::riscv::REG::V27_V28_V29_V30
@ V27_V28_V29_V30
Definition riscv/registers.hpp:426

LIEF::assembly::riscv::REG::X15_W
@ X15_W
Definition riscv/registers.hpp:243

LIEF::assembly::riscv::REG::F0_D
@ F0_D
Definition riscv/registers.hpp:99

LIEF::assembly::riscv::REG::F27_F
@ F27_F
Definition riscv/registers.hpp:158

LIEF::assembly::riscv::REG::V10M2_V12M2_V14M2_V16M2
@ V10M2_V12M2_V14M2_V16M2
Definition riscv/registers.hpp:433

LIEF::assembly::riscv::REG::F18_F
@ F18_F
Definition riscv/registers.hpp:149

LIEF::assembly::riscv::REG::F5_D
@ F5_D
Definition riscv/registers.hpp:104

LIEF::assembly::riscv::REG::V3_V4_V5_V6_V7_V8_V9_V10
@ V3_V4_V5_V6_V7_V8_V9_V10
Definition riscv/registers.hpp:525

LIEF::assembly::riscv::REG::V23_V24_V25_V26_V27_V28
@ V23_V24_V25_V26_V27_V28
Definition riscv/registers.hpp:492

LIEF::assembly::riscv::REG::V24M2_V26M2_V28M2_V30M2
@ V24M2_V26M2_V28M2_V30M2
Definition riscv/registers.hpp:440

LIEF::assembly::riscv::REG::F17_H
@ F17_H
Definition riscv/registers.hpp:180

LIEF::assembly::riscv::REG::F10_D
@ F10_D
Definition riscv/registers.hpp:109

LIEF::assembly::riscv::REG::V0_V1_V2
@ V0_V1_V2
Definition riscv/registers.hpp:385

LIEF::assembly::riscv::REG::V25_V26_V27_V28_V29
@ V25_V26_V27_V28_V29
Definition riscv/registers.hpp:466

LIEF::assembly::riscv::REG::V13_V14_V15_V16_V17_V18
@ V13_V14_V15_V16_V17_V18
Definition riscv/registers.hpp:482

LIEF::assembly::riscv::REG::V19_V20_V21_V22_V23
@ V19_V20_V21_V22_V23
Definition riscv/registers.hpp:460

LIEF::assembly::riscv::REG::F12_D
@ F12_D
Definition riscv/registers.hpp:111

LIEF::assembly::riscv::REG::X0_Pair
@ X0_Pair
Definition riscv/registers.hpp:227

LIEF::assembly::riscv::REG::X29_W
@ X29_W
Definition riscv/registers.hpp:257

LIEF::assembly::riscv::REG::F10_H
@ F10_H
Definition riscv/registers.hpp:173

LIEF::assembly::riscv::REG::F0_F
@ F0_F
Definition riscv/registers.hpp:131

LIEF::assembly::riscv::REG::X19
@ X19
Definition riscv/registers.hpp:86

LIEF::assembly::riscv::REG::V20M4
@ V20M4
Definition riscv/registers.hpp:279

LIEF::assembly::riscv::REG::F18_H
@ F18_H
Definition riscv/registers.hpp:181

LIEF::assembly::riscv::REG::V0_V1_V2_V3_V4_V5_V6
@ V0_V1_V2_V3_V4_V5_V6
Definition riscv/registers.hpp:522

LIEF::assembly::riscv::REG::F13_H
@ F13_H
Definition riscv/registers.hpp:176

LIEF::assembly::riscv::REG::V15_V16_V17_V18_V19
@ V15_V16_V17_V18_V19
Definition riscv/registers.hpp:456

LIEF::assembly::riscv::REG::V1_V2_V3_V4_V5_V6_V7
@ V1_V2_V3_V4_V5_V6_V7
Definition riscv/registers.hpp:497

LIEF::assembly::riscv::REG::V26
@ V26
Definition riscv/registers.hpp:61

LIEF::assembly::riscv::REG::F24_F
@ F24_F
Definition riscv/registers.hpp:155

LIEF::assembly::riscv::REG::V2M2_V4M2_V6M2
@ V2M2_V4M2_V6M2
Definition riscv/registers.hpp:386

LIEF::assembly::riscv::REG::V26_V27_V28_V29_V30_V31
@ V26_V27_V28_V29_V30_V31
Definition riscv/registers.hpp:495

LIEF::assembly::riscv::REG::V23
@ V23
Definition riscv/registers.hpp:58

LIEF::assembly::riscv::REG::F23_F
@ F23_F
Definition riscv/registers.hpp:154

LIEF::assembly::riscv::REG::X1_H
@ X1_H
Definition riscv/registers.hpp:196

LIEF::assembly::riscv::REG::V8M8
@ V8M8
Definition riscv/registers.hpp:269

LIEF::assembly::riscv::REG::V12M2_V14M2
@ V12M2_V14M2
Definition riscv/registers.hpp:339

LIEF::assembly::riscv::REG::V26M2_V28M2_V30M2
@ V26M2_V28M2_V30M2
Definition riscv/registers.hpp:398

LIEF::assembly::riscv::REG::V6_V7_V8_V9_V10
@ V6_V7_V8_V9_V10
Definition riscv/registers.hpp:447

LIEF::assembly::riscv::REG::F31_H
@ F31_H
Definition riscv/registers.hpp:194

LIEF::assembly::riscv::REG::V18M2_V20M2_V22M2_V24M2
@ V18M2_V20M2_V22M2_V24M2
Definition riscv/registers.hpp:437

LIEF::assembly::riscv::REG::V16_V17_V18
@ V16_V17_V18
Definition riscv/registers.hpp:371

LIEF::assembly::riscv::REG::V28_V29
@ V28_V29
Definition riscv/registers.hpp:330

LIEF::assembly::riscv::REG::V6_V7_V8_V9_V10_V11_V12
@ V6_V7_V8_V9_V10_V11_V12
Definition riscv/registers.hpp:502

LIEF::assembly::riscv::REG::F13_D
@ F13_D
Definition riscv/registers.hpp:112

LIEF::assembly::riscv::REG::V12_V13
@ V12_V13
Definition riscv/registers.hpp:314

LIEF::assembly::riscv::REG::V25_V26_V27_V28_V29_V30_V31
@ V25_V26_V27_V28_V29_V30_V31
Definition riscv/registers.hpp:521

LIEF::assembly::riscv::REG::V6_V7_V8
@ V6_V7_V8
Definition riscv/registers.hpp:361

LIEF::assembly::riscv::REG::V2_V3_V4_V5_V6_V7_V8
@ V2_V3_V4_V5_V6_V7_V8
Definition riscv/registers.hpp:498

LIEF::assembly::riscv::REG::V6_V7_V8_V9
@ V6_V7_V8_V9
Definition riscv/registers.hpp:405

LIEF::assembly::riscv::REG::V15_V16_V17_V18_V19_V20
@ V15_V16_V17_V18_V19_V20
Definition riscv/registers.hpp:484

LIEF::assembly::riscv::REG::V15_V16_V17_V18_V19_V20_V21
@ V15_V16_V17_V18_V19_V20_V21
Definition riscv/registers.hpp:511

LIEF::assembly::riscv::REG::V2_V3_V4_V5_V6_V7
@ V2_V3_V4_V5_V6_V7
Definition riscv/registers.hpp:471

LIEF::assembly::riscv::REG::V17_V18_V19_V20_V21_V22
@ V17_V18_V19_V20_V21_V22
Definition riscv/registers.hpp:486

LIEF::assembly::riscv::REG::F24_H
@ F24_H
Definition riscv/registers.hpp:187

LIEF::assembly::riscv::REG::F2_D
@ F2_D
Definition riscv/registers.hpp:101

LIEF::assembly::riscv::REG::X26_W
@ X26_W
Definition riscv/registers.hpp:254

LIEF::assembly::riscv::REG::V24_V25
@ V24_V25
Definition riscv/registers.hpp:326

LIEF::assembly::riscv::REG::V17
@ V17
Definition riscv/registers.hpp:52

LIEF::assembly::riscv::REG::F26_H
@ F26_H
Definition riscv/registers.hpp:189

LIEF::assembly::riscv::REG::V27_V28_V29_V30_V31
@ V27_V28_V29_V30_V31
Definition riscv/registers.hpp:468

LIEF::assembly::riscv::REG::F1_F
@ F1_F
Definition riscv/registers.hpp:132

LIEF::assembly::riscv::REG::V7_V8
@ V7_V8
Definition riscv/registers.hpp:309

LIEF::assembly::riscv::REG::V16M4
@ V16M4
Definition riscv/registers.hpp:275

LIEF::assembly::riscv::REG::NUM_TARGET_REGS
@ NUM_TARGET_REGS
Definition riscv/registers.hpp:548

LIEF::assembly::riscv::REG::V13_V14_V15
@ V13_V14_V15
Definition riscv/registers.hpp:368

LIEF::assembly::riscv::REG::V16
@ V16
Definition riscv/registers.hpp:51

LIEF::assembly::riscv::REG::V15_V16_V17_V18_V19_V20_V21_V22
@ V15_V16_V17_V18_V19_V20_V21_V22
Definition riscv/registers.hpp:537

LIEF::assembly::riscv::REG::F4_H
@ F4_H
Definition riscv/registers.hpp:167

LIEF::assembly::riscv::REG::F16_D
@ F16_D
Definition riscv/registers.hpp:115

LIEF::assembly::riscv::REG::V23_V24
@ V23_V24
Definition riscv/registers.hpp:325

LIEF::assembly::riscv::REG::F30_D
@ F30_D
Definition riscv/registers.hpp:129

LIEF::assembly::riscv::REG::X1_W
@ X1_W
Definition riscv/registers.hpp:229

LIEF::assembly::riscv::REG::V8_V9_V10_V11_V12_V13_V14_V15
@ V8_V9_V10_V11_V12_V13_V14_V15
Definition riscv/registers.hpp:530

LIEF::assembly::riscv::REG::V9_V10_V11_V12_V13_V14_V15
@ V9_V10_V11_V12_V13_V14_V15
Definition riscv/registers.hpp:505

LIEF::assembly::riscv::REG::V10
@ V10
Definition riscv/registers.hpp:45

LIEF::assembly::riscv::REG::X15_H
@ X15_H
Definition riscv/registers.hpp:210

LIEF::assembly::riscv::REG::F12_F
@ F12_F
Definition riscv/registers.hpp:143

LIEF::assembly::riscv::REG::V15
@ V15
Definition riscv/registers.hpp:50

LIEF::assembly::riscv::REG::V4_V5_V6_V7_V8_V9_V10
@ V4_V5_V6_V7_V8_V9_V10
Definition riscv/registers.hpp:500

LIEF::assembly::riscv::REG::V18M2
@ V18M2
Definition riscv/registers.hpp:277

LIEF::assembly::riscv::REG::X2_W
@ X2_W
Definition riscv/registers.hpp:230

LIEF::assembly::riscv::REG::X8_H
@ X8_H
Definition riscv/registers.hpp:203

LIEF::assembly::riscv::REG::F7_H
@ F7_H
Definition riscv/registers.hpp:170

LIEF::assembly::riscv::REG::V22_V23_V24
@ V22_V23_V24
Definition riscv/registers.hpp:377

LIEF::assembly::riscv::REG::V9
@ V9
Definition riscv/registers.hpp:44

LIEF::assembly::riscv::REG::V9_V10_V11_V12_V13_V14_V15_V16
@ V9_V10_V11_V12_V13_V14_V15_V16
Definition riscv/registers.hpp:531

LIEF::assembly::riscv::REG::V28_V29_V30_V31
@ V28_V29_V30_V31
Definition riscv/registers.hpp:427

LIEF::assembly::riscv::REG::X21
@ X21
Definition riscv/registers.hpp:88

LIEF::assembly::riscv::REG::V8_V9_V10
@ V8_V9_V10
Definition riscv/registers.hpp:363

LIEF::assembly::riscv::REG::V30
@ V30
Definition riscv/registers.hpp:65

LIEF::assembly::riscv::REG::V21_V22_V23_V24
@ V21_V22_V23_V24
Definition riscv/registers.hpp:420

LIEF::assembly::riscv::REG::V17_V18_V19
@ V17_V18_V19
Definition riscv/registers.hpp:372

LIEF::assembly::riscv::REG::V29_V30_V31
@ V29_V30_V31
Definition riscv/registers.hpp:384

LIEF::assembly::riscv::REG::X23
@ X23
Definition riscv/registers.hpp:90

LIEF::assembly::riscv::REG::X18_W
@ X18_W
Definition riscv/registers.hpp:246

LIEF::assembly::riscv::REG::X11_H
@ X11_H
Definition riscv/registers.hpp:206

LIEF::assembly::riscv::REG::V13_V14_V15_V16_V17_V18_V19
@ V13_V14_V15_V16_V17_V18_V19
Definition riscv/registers.hpp:509

LIEF::assembly::riscv::REG::V19
@ V19
Definition riscv/registers.hpp:54

LIEF::assembly::riscv::REG::V3_V4_V5_V6_V7_V8_V9
@ V3_V4_V5_V6_V7_V8_V9
Definition riscv/registers.hpp:499

LIEF::assembly::riscv::REG::X22
@ X22
Definition riscv/registers.hpp:89

LIEF::assembly::riscv::REG::F26_D
@ F26_D
Definition riscv/registers.hpp:125

LIEF::assembly::riscv::REG::V0_V1
@ V0_V1
Definition riscv/registers.hpp:333

LIEF::assembly::riscv::REG::V11_V12_V13_V14
@ V11_V12_V13_V14
Definition riscv/registers.hpp:410

LIEF::assembly::riscv::REG::X5
@ X5
Definition riscv/registers.hpp:72

LIEF::assembly::riscv::REG::F19_H
@ F19_H
Definition riscv/registers.hpp:182

LIEF::assembly::riscv::REG::V22
@ V22
Definition riscv/registers.hpp:57

LIEF::assembly::riscv::REG::V26M2_V28M2
@ V26M2_V28M2
Definition riscv/registers.hpp:346

LIEF::assembly::riscv::REG::V13_V14
@ V13_V14
Definition riscv/registers.hpp:315

LIEF::assembly::riscv::REG::F3_D
@ F3_D
Definition riscv/registers.hpp:102

LIEF::assembly::riscv::REG::V11_V12_V13_V14_V15
@ V11_V12_V13_V14_V15
Definition riscv/registers.hpp:452

LIEF::assembly::riscv::REG::V14_V15_V16
@ V14_V15_V16
Definition riscv/registers.hpp:369

LIEF::assembly::riscv::REG::F5_F
@ F5_F
Definition riscv/registers.hpp:136

LIEF::assembly::riscv::REG::F26_F
@ F26_F
Definition riscv/registers.hpp:157

LIEF::assembly::riscv::REG::V0M2_V2M2_V4M2_V6M2
@ V0M2_V2M2_V4M2_V6M2
Definition riscv/registers.hpp:441

LIEF::assembly::riscv::REG::VL
@ VL
Definition riscv/registers.hpp:29

LIEF::assembly::riscv::REG::V4_V5_V6_V7_V8_V9
@ V4_V5_V6_V7_V8_V9
Definition riscv/registers.hpp:473

LIEF::assembly::riscv::REG::V6M2_V8M2_V10M2_V12M2
@ V6M2_V8M2_V10M2_V12M2
Definition riscv/registers.hpp:431

LIEF::assembly::riscv::REG::X2
@ X2
Definition riscv/registers.hpp:69

LIEF::assembly::riscv::REG::X18
@ X18
Definition riscv/registers.hpp:85

LIEF::assembly::riscv::REG::V21_V22_V23
@ V21_V22_V23
Definition riscv/registers.hpp:376

LIEF::assembly::riscv::REG::V16_V17
@ V16_V17
Definition riscv/registers.hpp:318

LIEF::assembly::riscv::REG::F4_D
@ F4_D
Definition riscv/registers.hpp:103

LIEF::assembly::riscv::REG::V16_V17_V18_V19_V20_V21_V22
@ V16_V17_V18_V19_V20_V21_V22
Definition riscv/registers.hpp:512

LIEF::assembly::riscv::REG::V0M4_V4M4
@ V0M4_V4M4
Definition riscv/registers.hpp:355

LIEF::assembly::riscv::REG::V22M2_V24M2_V26M2_V28M2
@ V22M2_V24M2_V26M2_V28M2
Definition riscv/registers.hpp:439

LIEF::assembly::riscv::REG::V12M2_V14M2_V16M2
@ V12M2_V14M2_V16M2
Definition riscv/registers.hpp:391

LIEF::assembly::riscv::REG::V29
@ V29
Definition riscv/registers.hpp:64

LIEF::assembly::riscv::REG::V2M2_V4M2
@ V2M2_V4M2
Definition riscv/registers.hpp:334

LIEF::assembly::riscv::REG::X27
@ X27
Definition riscv/registers.hpp:94

LIEF::assembly::riscv::REG::F22_F
@ F22_F
Definition riscv/registers.hpp:153

LIEF::assembly::riscv::REG::V7_V8_V9_V10
@ V7_V8_V9_V10
Definition riscv/registers.hpp:406

LIEF::assembly::riscv::REG::F21_F
@ F21_F
Definition riscv/registers.hpp:152

LIEF::assembly::riscv::REG::V24_V25_V26_V27
@ V24_V25_V26_V27
Definition riscv/registers.hpp:423

LIEF::assembly::riscv::REG::VXSAT
@ VXSAT
Definition riscv/registers.hpp:33

LIEF::assembly::riscv::REG::V16_V17_V18_V19_V20_V21
@ V16_V17_V18_V19_V20_V21
Definition riscv/registers.hpp:485

LIEF::assembly::riscv::REG::F11_F
@ F11_F
Definition riscv/registers.hpp:142

LIEF::assembly::riscv::REG::V10_V11_V12_V13
@ V10_V11_V12_V13
Definition riscv/registers.hpp:409

LIEF::assembly::riscv::REG::V12_V13_V14_V15_V16_V17
@ V12_V13_V14_V15_V16_V17
Definition riscv/registers.hpp:481

LIEF::assembly::riscv::REG::F29_F
@ F29_F
Definition riscv/registers.hpp:160

LIEF::assembly::riscv::REG::F3_H
@ F3_H
Definition riscv/registers.hpp:166

LIEF::assembly::riscv::REG::V2_V3_V4_V5_V6
@ V2_V3_V4_V5_V6
Definition riscv/registers.hpp:443

LIEF::assembly::riscv::REG::X13_W
@ X13_W
Definition riscv/registers.hpp:241

LIEF::assembly::riscv::REG::V14
@ V14
Definition riscv/registers.hpp:49

LIEF::assembly::riscv::REG::SF_VCIX_STATE
@ SF_VCIX_STATE
Definition riscv/registers.hpp:27

LIEF::assembly::riscv::REG::F20_D
@ F20_D
Definition riscv/registers.hpp:119

LIEF::assembly::riscv::REG::F12_H
@ F12_H
Definition riscv/registers.hpp:175

LIEF::assembly::riscv::REG::V13_V14_V15_V16_V17_V18_V19_V20
@ V13_V14_V15_V16_V17_V18_V19_V20
Definition riscv/registers.hpp:535

LIEF::assembly::riscv::REG::X6_X7
@ X6_X7
Definition riscv/registers.hpp:290

LIEF::assembly::riscv::REG::V19_V20_V21
@ V19_V20_V21
Definition riscv/registers.hpp:374

LIEF::assembly::riscv::REG::X5_W
@ X5_W
Definition riscv/registers.hpp:233

LIEF::assembly::riscv::REG::F0_H
@ F0_H
Definition riscv/registers.hpp:163

LIEF::assembly::riscv::REG::V12_V13_V14_V15_V16_V17_V18
@ V12_V13_V14_V15_V16_V17_V18
Definition riscv/registers.hpp:508

LIEF::assembly::riscv::REG::V24M4_V28M4
@ V24M4_V28M4
Definition riscv/registers.hpp:354

LIEF::assembly::riscv::REG::V6M2_V8M2
@ V6M2_V8M2
Definition riscv/registers.hpp:336

LIEF::assembly::riscv::REG::V27_V28_V29
@ V27_V28_V29
Definition riscv/registers.hpp:382

LIEF::assembly::riscv::REG::X0_H
@ X0_H
Definition riscv/registers.hpp:195

LIEF::assembly::riscv::REG::X29
@ X29
Definition riscv/registers.hpp:96

LIEF::assembly::riscv::REG::V17_V18_V19_V20
@ V17_V18_V19_V20
Definition riscv/registers.hpp:416

LIEF::assembly::riscv::REG::V26_V27_V28_V29
@ V26_V27_V28_V29
Definition riscv/registers.hpp:425

LIEF::assembly::riscv::REG::V8_V9_V10_V11
@ V8_V9_V10_V11
Definition riscv/registers.hpp:407

LIEF::assembly::riscv::REG::V4M4
@ V4M4
Definition riscv/registers.hpp:265

LIEF::assembly::riscv::REG::X25_H
@ X25_H
Definition riscv/registers.hpp:220

LIEF::assembly::riscv::REG::V11_V12
@ V11_V12
Definition riscv/registers.hpp:313

LIEF::assembly::riscv::REG::X24_X25
@ X24_X25
Definition riscv/registers.hpp:299

LIEF::assembly::riscv::REG::V24_V25_V26_V27_V28_V29_V30_V31
@ V24_V25_V26_V27_V28_V29_V30_V31
Definition riscv/registers.hpp:546

LIEF::assembly::riscv::REG::V10_V11_V12_V13_V14_V15
@ V10_V11_V12_V13_V14_V15
Definition riscv/registers.hpp:479

LIEF::assembly::riscv::REG::X18_H
@ X18_H
Definition riscv/registers.hpp:213

LIEF::assembly::riscv::REG::X14
@ X14
Definition riscv/registers.hpp:81

LIEF::assembly::riscv::REG::V21_V22_V23_V24_V25_V26
@ V21_V22_V23_V24_V25_V26
Definition riscv/registers.hpp:490

LIEF::assembly::riscv::REG::F29_H
@ F29_H
Definition riscv/registers.hpp:192

LIEF::assembly::riscv::REG::V24_V25_V26_V27_V28_V29
@ V24_V25_V26_V27_V28_V29
Definition riscv/registers.hpp:493

LIEF::assembly::riscv::REG::V0_V1_V2_V3_V4
@ V0_V1_V2_V3_V4
Definition riscv/registers.hpp:469

LIEF::assembly::riscv::REG::V17_V18_V19_V20_V21_V22_V23
@ V17_V18_V19_V20_V21_V22_V23
Definition riscv/registers.hpp:513

LIEF::assembly::riscv::REG::F2_F
@ F2_F
Definition riscv/registers.hpp:133

LIEF::assembly::riscv::REG::X17_W
@ X17_W
Definition riscv/registers.hpp:245

LIEF::assembly::riscv::REG::X12_X13
@ X12_X13
Definition riscv/registers.hpp:293

LIEF::assembly::riscv::REG::V20M2
@ V20M2
Definition riscv/registers.hpp:278

LIEF::assembly::riscv::REG::F23_D
@ F23_D
Definition riscv/registers.hpp:122

LIEF::assembly::riscv::REG::V11_V12_V13_V14_V15_V16_V17
@ V11_V12_V13_V14_V15_V16_V17
Definition riscv/registers.hpp:507

LIEF::assembly::riscv::REG::V18_V19_V20
@ V18_V19_V20
Definition riscv/registers.hpp:373

LIEF::assembly::riscv::REG::X3_W
@ X3_W
Definition riscv/registers.hpp:231

LIEF::assembly::riscv::REG::X17_H
@ X17_H
Definition riscv/registers.hpp:212

LIEF::assembly::riscv::REG::V15_V16_V17
@ V15_V16_V17
Definition riscv/registers.hpp:370

LIEF::assembly::riscv::REG::V28M2
@ V28M2
Definition riscv/registers.hpp:285

LIEF::assembly::riscv::REG::X15
@ X15
Definition riscv/registers.hpp:82

LIEF::assembly::riscv::REG::V21_V22_V23_V24_V25_V26_V27_V28
@ V21_V22_V23_V24_V25_V26_V27_V28
Definition riscv/registers.hpp:543

LIEF::assembly::riscv::REG::V4M2_V6M2
@ V4M2_V6M2
Definition riscv/registers.hpp:335

LIEF::assembly::riscv::REG::F7_F
@ F7_F
Definition riscv/registers.hpp:138

LIEF::assembly::riscv::REG::V6M2_V8M2_V10M2
@ V6M2_V8M2_V10M2
Definition riscv/registers.hpp:388

LIEF::assembly::riscv::REG::X14_W
@ X14_W
Definition riscv/registers.hpp:242

LIEF::assembly::riscv::REG::F22_D
@ F22_D
Definition riscv/registers.hpp:121

LIEF::assembly::riscv::REG::V8_V9_V10_V11_V12
@ V8_V9_V10_V11_V12
Definition riscv/registers.hpp:449

LIEF::assembly::riscv::REG::F20_F
@ F20_F
Definition riscv/registers.hpp:151

LIEF::assembly::riscv::REG::V22_V23
@ V22_V23
Definition riscv/registers.hpp:324

LIEF::assembly::riscv::REG::X11_W
@ X11_W
Definition riscv/registers.hpp:239

LIEF::assembly::riscv::REG::V23_V24_V25
@ V23_V24_V25
Definition riscv/registers.hpp:378

LIEF::assembly::riscv::REG::X24
@ X24
Definition riscv/registers.hpp:91

LIEF::assembly::riscv::REG::V20_V21_V22
@ V20_V21_V22
Definition riscv/registers.hpp:375

LIEF::assembly::riscv::REG::X5_H
@ X5_H
Definition riscv/registers.hpp:200

LIEF::assembly::riscv::REG::X9
@ X9
Definition riscv/registers.hpp:76

LIEF::assembly::riscv::REG::V30_V31
@ V30_V31
Definition riscv/registers.hpp:332

LIEF::assembly::riscv::REG::V26_V27_V28
@ V26_V27_V28
Definition riscv/registers.hpp:381

LIEF::assembly::riscv::REG::V10_V11_V12
@ V10_V11_V12
Definition riscv/registers.hpp:365

LIEF::assembly::riscv::REG::X4
@ X4
Definition riscv/registers.hpp:71

LIEF::assembly::riscv::REG::V14M2_V16M2_V18M2
@ V14M2_V16M2_V18M2
Definition riscv/registers.hpp:392

LIEF::assembly::riscv::REG::X20
@ X20
Definition riscv/registers.hpp:87

LIEF::assembly::riscv::REG::X4_H
@ X4_H
Definition riscv/registers.hpp:199

LIEF::assembly::riscv::REG::V1_V2_V3_V4_V5_V6_V7_V8
@ V1_V2_V3_V4_V5_V6_V7_V8
Definition riscv/registers.hpp:523

LIEF::assembly::riscv::REG::V24_V25_V26_V27_V28
@ V24_V25_V26_V27_V28
Definition riscv/registers.hpp:465

LIEF::assembly::riscv::REG::X12_H
@ X12_H
Definition riscv/registers.hpp:207

LIEF::assembly::riscv::REG::V6_V7_V8_V9_V10_V11_V12_V13
@ V6_V7_V8_V9_V10_V11_V12_V13
Definition riscv/registers.hpp:528

LIEF::assembly::riscv::REG::F16_H
@ F16_H
Definition riscv/registers.hpp:179

LIEF::assembly::riscv::REG::F9_H
@ F9_H
Definition riscv/registers.hpp:172

LIEF::assembly::riscv::REG::F24_D
@ F24_D
Definition riscv/registers.hpp:123

LIEF::assembly::riscv::REG::X24_W
@ X24_W
Definition riscv/registers.hpp:252

LIEF::assembly::riscv::REG::V2_V3
@ V2_V3
Definition riscv/registers.hpp:304

LIEF::assembly::riscv::REG::V5_V6_V7_V8
@ V5_V6_V7_V8
Definition riscv/registers.hpp:404

LIEF::assembly::riscv::REG::FRM
@ FRM
Definition riscv/registers.hpp:26

LIEF::assembly::riscv::REG::F28_F
@ F28_F
Definition riscv/registers.hpp:159

LIEF::assembly::riscv::REG::F25_D
@ F25_D
Definition riscv/registers.hpp:124

LIEF::assembly::riscv::REG::F21_D
@ F21_D
Definition riscv/registers.hpp:120

LIEF::assembly::riscv::REG::X16_H
@ X16_H
Definition riscv/registers.hpp:211

LIEF::assembly::riscv::REG::X16
@ X16
Definition riscv/registers.hpp:83

LIEF::assembly::riscv::REG::F27_D
@ F27_D
Definition riscv/registers.hpp:126

LIEF::assembly::riscv::REG::F21_H
@ F21_H
Definition riscv/registers.hpp:184

LIEF::assembly::riscv::REG::V24M2
@ V24M2
Definition riscv/registers.hpp:281

LIEF::assembly::riscv::REG::V0_V1_V2_V3_V4_V5_V6_V7
@ V0_V1_V2_V3_V4_V5_V6_V7
Definition riscv/registers.hpp:547

LIEF::assembly::riscv::REG::F18_D
@ F18_D
Definition riscv/registers.hpp:117

LIEF::assembly::riscv::REG::V5
@ V5
Definition riscv/registers.hpp:40

LIEF::assembly::riscv::REG::V13
@ V13
Definition riscv/registers.hpp:48

LIEF::assembly::riscv::REG::F23_H
@ F23_H
Definition riscv/registers.hpp:186

LIEF::assembly::riscv::REG::V19_V20_V21_V22
@ V19_V20_V21_V22
Definition riscv/registers.hpp:418

LIEF::assembly::riscv::REG::V23_V24_V25_V26
@ V23_V24_V25_V26
Definition riscv/registers.hpp:422

LIEF::assembly::riscv::REG::F28_H
@ F28_H
Definition riscv/registers.hpp:191

LIEF::assembly::riscv::REG::V10_V11_V12_V13_V14_V15_V16
@ V10_V11_V12_V13_V14_V15_V16
Definition riscv/registers.hpp:506

LIEF::assembly::riscv::REG::V6_V7
@ V6_V7
Definition riscv/registers.hpp:308

LIEF::assembly::riscv::REG::V20_V21_V22_V23
@ V20_V21_V22_V23
Definition riscv/registers.hpp:419

LIEF::assembly::riscv::REG::F19_F
@ F19_F
Definition riscv/registers.hpp:150

LIEF::assembly::riscv::REG::V4_V5
@ V4_V5
Definition riscv/registers.hpp:306

LIEF::assembly::riscv::REG::V23_V24_V25_V26_V27_V28_V29
@ V23_V24_V25_V26_V27_V28_V29
Definition riscv/registers.hpp:519

LIEF::assembly::riscv::REG::F15_H
@ F15_H
Definition riscv/registers.hpp:178

LIEF::assembly::riscv::REG::X14_H
@ X14_H
Definition riscv/registers.hpp:209

LIEF::assembly::riscv::REG::V24M8
@ V24M8
Definition riscv/registers.hpp:283

LIEF::assembly::riscv::REG::V11
@ V11
Definition riscv/registers.hpp:46

LIEF::assembly::riscv::REG::V5_V6_V7_V8_V9_V10_V11
@ V5_V6_V7_V8_V9_V10_V11
Definition riscv/registers.hpp:501

LIEF::assembly::riscv::REG::V20_V21
@ V20_V21
Definition riscv/registers.hpp:322

LIEF::assembly::riscv::REG::X24_H
@ X24_H
Definition riscv/registers.hpp:219

LIEF::assembly::riscv::REG::V25_V26
@ V25_V26
Definition riscv/registers.hpp:327

LIEF::assembly::riscv::REG::V28M4
@ V28M4
Definition riscv/registers.hpp:286

LIEF::assembly::riscv::REG::X21_W
@ X21_W
Definition riscv/registers.hpp:249

LIEF::assembly::riscv::REG::VTYPE
@ VTYPE
Definition riscv/registers.hpp:31

LIEF::assembly::riscv::REG::V7_V8_V9_V10_V11_V12_V13_V14
@ V7_V8_V9_V10_V11_V12_V13_V14
Definition riscv/registers.hpp:529

LIEF::assembly::riscv::REG::X22_W
@ X22_W
Definition riscv/registers.hpp:250

LIEF::assembly::riscv::REG::X10_H
@ X10_H
Definition riscv/registers.hpp:205

LIEF::assembly::riscv::REG::V27_V28
@ V27_V28
Definition riscv/registers.hpp:329

LIEF::assembly::riscv::REG::V6M2
@ V6M2
Definition riscv/registers.hpp:266

LIEF::assembly::riscv::REG::F5_H
@ F5_H
Definition riscv/registers.hpp:168

LIEF::assembly::riscv::REG::V12M2
@ V12M2
Definition riscv/registers.hpp:271

LIEF::assembly::riscv::REG::F6_H
@ F6_H
Definition riscv/registers.hpp:169

LIEF::assembly::riscv::REG::V2_V3_V4
@ V2_V3_V4
Definition riscv/registers.hpp:357

LIEF::assembly::riscv::REG::V25_V26_V27_V28_V29_V30
@ V25_V26_V27_V28_V29_V30
Definition riscv/registers.hpp:494

LIEF::assembly::riscv::REG::V22M2_V24M2_V26M2
@ V22M2_V24M2_V26M2
Definition riscv/registers.hpp:396

LIEF::assembly::riscv::REG::V22M2_V24M2
@ V22M2_V24M2
Definition riscv/registers.hpp:344

LIEF::assembly::riscv::REG::V29_V30
@ V29_V30
Definition riscv/registers.hpp:331

LIEF::assembly::riscv::REG::F31_D
@ F31_D
Definition riscv/registers.hpp:130

LIEF::assembly::riscv::REG::V15_V16_V17_V18
@ V15_V16_V17_V18
Definition riscv/registers.hpp:414

LIEF::assembly::riscv::REG::V4M2_V6M2_V8M2
@ V4M2_V6M2_V8M2
Definition riscv/registers.hpp:387

LIEF::assembly::riscv::REG::V13_V14_V15_V16_V17
@ V13_V14_V15_V16_V17
Definition riscv/registers.hpp:454

LIEF::assembly::riscv::REG::V26M2
@ V26M2
Definition riscv/registers.hpp:284

LIEF::assembly::riscv::REG::F14_F
@ F14_F
Definition riscv/registers.hpp:145

LIEF::assembly::riscv::REG::V12_V13_V14_V15
@ V12_V13_V14_V15
Definition riscv/registers.hpp:411

LIEF::assembly::riscv::REG::X31_H
@ X31_H
Definition riscv/registers.hpp:226

LIEF::assembly::riscv::REG::F22_H
@ F22_H
Definition riscv/registers.hpp:185

LIEF::assembly::riscv::REG::V9_V10_V11_V12_V13
@ V9_V10_V11_V12_V13
Definition riscv/registers.hpp:450

LIEF::assembly::riscv::REG::V8_V9_V10_V11_V12_V13_V14
@ V8_V9_V10_V11_V12_V13_V14
Definition riscv/registers.hpp:504

LIEF::assembly::riscv::REG::V22M2
@ V22M2
Definition riscv/registers.hpp:280

LIEF::assembly::riscv::REG::X12
@ X12
Definition riscv/registers.hpp:79

LIEF::assembly::riscv::REG::X16_W
@ X16_W
Definition riscv/registers.hpp:244

LIEF::assembly::riscv::REG::V7_V8_V9_V10_V11
@ V7_V8_V9_V10_V11
Definition riscv/registers.hpp:448

LIEF::assembly::riscv::REG::V9_V10_V11_V12_V13_V14
@ V9_V10_V11_V12_V13_V14
Definition riscv/registers.hpp:478

LIEF::assembly::riscv::REG::V8M2
@ V8M2
Definition riscv/registers.hpp:267

LIEF::assembly::riscv::REG::VLENB
@ VLENB
Definition riscv/registers.hpp:30

LIEF::assembly::riscv::REG::X7_H
@ X7_H
Definition riscv/registers.hpp:202

LIEF::assembly::riscv::REG::V20M4_V24M4
@ V20M4_V24M4
Definition riscv/registers.hpp:353

LIEF::assembly::riscv::REG::V10M2_V12M2
@ V10M2_V12M2
Definition riscv/registers.hpp:338

LIEF::assembly::riscv::REG::V25_V26_V27
@ V25_V26_V27
Definition riscv/registers.hpp:380

LIEF::assembly::riscv::REG::V10_V11
@ V10_V11
Definition riscv/registers.hpp:312

LIEF::assembly::riscv::REG::V21_V22
@ V21_V22
Definition riscv/registers.hpp:323

LIEF::assembly::riscv::REG::X8_W
@ X8_W
Definition riscv/registers.hpp:236

LIEF::assembly::riscv::REG::V8M2_V10M2_V12M2_V14M2
@ V8M2_V10M2_V12M2_V14M2
Definition riscv/registers.hpp:432

LIEF::assembly::riscv::REG::X16_X17
@ X16_X17
Definition riscv/registers.hpp:295

LIEF::assembly::riscv::REG::V25_V26_V27_V28
@ V25_V26_V27_V28
Definition riscv/registers.hpp:424

LIEF::assembly::riscv::REG::V13_V14_V15_V16
@ V13_V14_V15_V16
Definition riscv/registers.hpp:412

LIEF::assembly::riscv::REG::V12
@ V12
Definition riscv/registers.hpp:47

LIEF::assembly::riscv::REG::V21
@ V21
Definition riscv/registers.hpp:56

LIEF::assembly::riscv::REG::X20_H
@ X20_H
Definition riscv/registers.hpp:215

LIEF::assembly::riscv::REG::X4_W
@ X4_W
Definition riscv/registers.hpp:232

LIEF::assembly::riscv::REG::F17_D
@ F17_D
Definition riscv/registers.hpp:116

LIEF::assembly::riscv::REG::F29_D
@ F29_D
Definition riscv/registers.hpp:128

LIEF::assembly::riscv::REG::V9_V10_V11
@ V9_V10_V11
Definition riscv/registers.hpp:364

LIEF::assembly::riscv::REG::V17_V18_V19_V20_V21
@ V17_V18_V19_V20_V21
Definition riscv/registers.hpp:458

LIEF::assembly::riscv::REG::X13
@ X13
Definition riscv/registers.hpp:80

LIEF::assembly::riscv::REG::X10
@ X10
Definition riscv/registers.hpp:77

LIEF::assembly::riscv::REG::X23_H
@ X23_H
Definition riscv/registers.hpp:218

LIEF::assembly::riscv::REG::NoRegister
@ NoRegister
Definition riscv/registers.hpp:24

LIEF::assembly::riscv::REG::X25_W
@ X25_W
Definition riscv/registers.hpp:253

LIEF::assembly::riscv::REG::V21_V22_V23_V24_V25_V26_V27
@ V21_V22_V23_V24_V25_V26_V27
Definition riscv/registers.hpp:517

LIEF::assembly::riscv::REG::V15_V16
@ V15_V16
Definition riscv/registers.hpp:317

LIEF::assembly::riscv::REG::V4_V5_V6
@ V4_V5_V6
Definition riscv/registers.hpp:359

LIEF::assembly::riscv::REG::V6_V7_V8_V9_V10_V11
@ V6_V7_V8_V9_V10_V11
Definition riscv/registers.hpp:475

LIEF::assembly::riscv::REG::V4
@ V4
Definition riscv/registers.hpp:39

LIEF::assembly::riscv::REG::V1_V2_V3
@ V1_V2_V3
Definition riscv/registers.hpp:356

LIEF::assembly::riscv::REG::V19_V20_V21_V22_V23_V24
@ V19_V20_V21_V22_V23_V24
Definition riscv/registers.hpp:488

LIEF::assembly::riscv::REG::X27_W
@ X27_W
Definition riscv/registers.hpp:255

LIEF::assembly::riscv::REG::V14M2
@ V14M2
Definition riscv/registers.hpp:273

LIEF::assembly::riscv::REG::V1
@ V1
Definition riscv/registers.hpp:36

LIEF::assembly::riscv::REG::V16M2_V18M2_V20M2_V22M2
@ V16M2_V18M2_V20M2_V22M2
Definition riscv/registers.hpp:436

LIEF::assembly::riscv::REG::X26
@ X26
Definition riscv/registers.hpp:93

LIEF::assembly::riscv::REG::F27_H
@ F27_H
Definition riscv/registers.hpp:190

LIEF::assembly::riscv::REG::V4M2_V6M2_V8M2_V10M2
@ V4M2_V6M2_V8M2_V10M2
Definition riscv/registers.hpp:430

LIEF::assembly::riscv::REG::X13_H
@ X13_H
Definition riscv/registers.hpp:208

LIEF::assembly::riscv::REG::X28_H
@ X28_H
Definition riscv/registers.hpp:223

LIEF::assembly::riscv::REG::V5_V6_V7
@ V5_V6_V7
Definition riscv/registers.hpp:360

LIEF::assembly::riscv::REG::V5_V6_V7_V8_V9
@ V5_V6_V7_V8_V9
Definition riscv/registers.hpp:446

LIEF::assembly::riscv::REG::X8
@ X8
Definition riscv/registers.hpp:75

LIEF::assembly::riscv::REG::F25_F
@ F25_F
Definition riscv/registers.hpp:156

LIEF::assembly::riscv::REG::V7_V8_V9_V10_V11_V12
@ V7_V8_V9_V10_V11_V12
Definition riscv/registers.hpp:476

LIEF::assembly::riscv::REG::DUMMY_REG_PAIR_WITH_X0
@ DUMMY_REG_PAIR_WITH_X0
Definition riscv/registers.hpp:34

LIEF::assembly::riscv::REG::X25
@ X25
Definition riscv/registers.hpp:92

LIEF::assembly::riscv::REG::F1_D
@ F1_D
Definition riscv/registers.hpp:100

LIEF::assembly::riscv::REG::X31_W
@ X31_W
Definition riscv/registers.hpp:259

LIEF::assembly::riscv::REG::V0_V1_V2_V3_V4_V5
@ V0_V1_V2_V3_V4_V5
Definition riscv/registers.hpp:496

LIEF::assembly::riscv::REG::V20
@ V20
Definition riscv/registers.hpp:55

LIEF::assembly::riscv::REG::X0
@ X0
Definition riscv/registers.hpp:67

LIEF::assembly::riscv::REG::V0M8
@ V0M8
Definition riscv/registers.hpp:262

LIEF::assembly::riscv::REG::V20_V21_V22_V23_V24
@ V20_V21_V22_V23_V24
Definition riscv/registers.hpp:461

LIEF::assembly::riscv::REG::X7
@ X7
Definition riscv/registers.hpp:74

LIEF::assembly::riscv::REG::X1
@ X1
Definition riscv/registers.hpp:68

LIEF::assembly::riscv::REG::V3_V4_V5_V6_V7
@ V3_V4_V5_V6_V7
Definition riscv/registers.hpp:444

LIEF::assembly::riscv::REG::V4_V5_V6_V7_V8
@ V4_V5_V6_V7_V8
Definition riscv/registers.hpp:445

LIEF::assembly::riscv::REG::V19_V20_V21_V22_V23_V24_V25_V26
@ V19_V20_V21_V22_V23_V24_V25_V26
Definition riscv/registers.hpp:541

LIEF::assembly::riscv::REG::V30M2
@ V30M2
Definition riscv/registers.hpp:287

LIEF::assembly::riscv::REG::X6_W
@ X6_W
Definition riscv/registers.hpp:234

LIEF::assembly::riscv::REG::V16M4_V20M4
@ V16M4_V20M4
Definition riscv/registers.hpp:352

LIEF::assembly::riscv::REG::V22_V23_V24_V25_V26
@ V22_V23_V24_V25_V26
Definition riscv/registers.hpp:463

LIEF::assembly::riscv::REG::F8_D
@ F8_D
Definition riscv/registers.hpp:107

LIEF::assembly::riscv::REG::F4_F
@ F4_F
Definition riscv/registers.hpp:135

LIEF::assembly::riscv::REG::V16_V17_V18_V19_V20
@ V16_V17_V18_V19_V20
Definition riscv/registers.hpp:457

LIEF::assembly::riscv::REG::V22_V23_V24_V25
@ V22_V23_V24_V25
Definition riscv/registers.hpp:421

LIEF::assembly::riscv::REG::F17_F
@ F17_F
Definition riscv/registers.hpp:148

LIEF::assembly::riscv::REG::V14_V15_V16_V17_V18_V19_V20_V21
@ V14_V15_V16_V17_V18_V19_V20_V21
Definition riscv/registers.hpp:536

LIEF::assembly::riscv::REG::F20_H
@ F20_H
Definition riscv/registers.hpp:183

LIEF::assembly::riscv::REG::V18
@ V18
Definition riscv/registers.hpp:53

LIEF::assembly::riscv::REG::V8M2_V10M2_V12M2
@ V8M2_V10M2_V12M2
Definition riscv/registers.hpp:389

LIEF::assembly::riscv::REG::FFLAGS
@ FFLAGS
Definition riscv/registers.hpp:25

LIEF::assembly::riscv::REG::X21_H
@ X21_H
Definition riscv/registers.hpp:216

LIEF::assembly::riscv::REG::SSP
@ SSP
Definition riscv/registers.hpp:28

LIEF::assembly::riscv::REG::X31
@ X31
Definition riscv/registers.hpp:98

LIEF::assembly::riscv::REG::X26_X27
@ X26_X27
Definition riscv/registers.hpp:300

LIEF::assembly::riscv::REG::V17_V18
@ V17_V18
Definition riscv/registers.hpp:319

LIEF::assembly::riscv::REG::V18_V19_V20_V21
@ V18_V19_V20_V21
Definition riscv/registers.hpp:417

LIEF::assembly::riscv::REG::V12_V13_V14
@ V12_V13_V14
Definition riscv/registers.hpp:367

LIEF::assembly::riscv::REG::X10_X11
@ X10_X11
Definition riscv/registers.hpp:292

LIEF::assembly::riscv::REG::V12_V13_V14_V15_V16_V17_V18_V19
@ V12_V13_V14_V15_V16_V17_V18_V19
Definition riscv/registers.hpp:534

LIEF::assembly::riscv::REG::X30
@ X30
Definition riscv/registers.hpp:97

LIEF::assembly::riscv::REG::F7_D
@ F7_D
Definition riscv/registers.hpp:106

LIEF::assembly::riscv::REG::X12_W
@ X12_W
Definition riscv/registers.hpp:240

LIEF::assembly::riscv::REG::F25_H
@ F25_H
Definition riscv/registers.hpp:188

LIEF::assembly::riscv::REG::V8M4_V12M4
@ V8M4_V12M4
Definition riscv/registers.hpp:350

LIEF::assembly::riscv::REG::F30_F
@ F30_F
Definition riscv/registers.hpp:161

LIEF::assembly::riscv::REG::X11
@ X11
Definition riscv/registers.hpp:78

LIEF::assembly::riscv::REG::X4_X5
@ X4_X5
Definition riscv/registers.hpp:289

LIEF::assembly::riscv::REG::V22_V23_V24_V25_V26_V27_V28_V29
@ V22_V23_V24_V25_V26_V27_V28_V29
Definition riscv/registers.hpp:544

LIEF::assembly::riscv::REG::X8_X9
@ X8_X9
Definition riscv/registers.hpp:291

LIEF::assembly::riscv::REG::F30_H
@ F30_H
Definition riscv/registers.hpp:193

LIEF::assembly::riscv::REG::V3_V4_V5_V6
@ V3_V4_V5_V6
Definition riscv/registers.hpp:402

LIEF::assembly::riscv::REG::V3
@ V3
Definition riscv/registers.hpp:38

LIEF::assembly::riscv::REG::F8_F
@ F8_F
Definition riscv/registers.hpp:139

LIEF::assembly::riscv::REG::X14_X15
@ X14_X15
Definition riscv/registers.hpp:294

LIEF::assembly::riscv::REG::V11_V12_V13
@ V11_V12_V13
Definition riscv/registers.hpp:366

LIEF::assembly::riscv::REG::V16M8
@ V16M8
Definition riscv/registers.hpp:276

LIEF::assembly::riscv::REG::V0M2
@ V0M2
Definition riscv/registers.hpp:260

LIEF::assembly::riscv::REG::V5_V6
@ V5_V6
Definition riscv/registers.hpp:307

LIEF::assembly::riscv::REG::X30_X31
@ X30_X31
Definition riscv/registers.hpp:302

LIEF::assembly::riscv::REG::V10_V11_V12_V13_V14_V15_V16_V17
@ V10_V11_V12_V13_V14_V15_V16_V17
Definition riscv/registers.hpp:532

LIEF::assembly::riscv::REG::F10_F
@ F10_F
Definition riscv/registers.hpp:141

LIEF::assembly::riscv::REG::X18_X19
@ X18_X19
Definition riscv/registers.hpp:296

LIEF::assembly::riscv::REG::V4_V5_V6_V7
@ V4_V5_V6_V7
Definition riscv/registers.hpp:403

LIEF::assembly::riscv::REG::V11_V12_V13_V14_V15_V16
@ V11_V12_V13_V14_V15_V16
Definition riscv/registers.hpp:480

LIEF::assembly::riscv::REG::X22_H
@ X22_H
Definition riscv/registers.hpp:217

LIEF::assembly::riscv::REG::F8_H
@ F8_H
Definition riscv/registers.hpp:171

LIEF::assembly::riscv::REG::X27_H
@ X27_H
Definition riscv/registers.hpp:222

LIEF::assembly::riscv::REG::V20_V21_V22_V23_V24_V25_V26
@ V20_V21_V22_V23_V24_V25_V26
Definition riscv/registers.hpp:516

LIEF::assembly::riscv::REG::X28_W
@ X28_W
Definition riscv/registers.hpp:256

LIEF::assembly::riscv::REG::V6
@ V6
Definition riscv/registers.hpp:41

LIEF::assembly::riscv::REG::F19_D
@ F19_D
Definition riscv/registers.hpp:118

LIEF::assembly::riscv::REG::V8M2_V10M2
@ V8M2_V10M2
Definition riscv/registers.hpp:337

LIEF::assembly::riscv::REG::V24_V25_V26
@ V24_V25_V26
Definition riscv/registers.hpp:379

LIEF::assembly::riscv::REG::V4M4_V8M4
@ V4M4_V8M4
Definition riscv/registers.hpp:349

LIEF::assembly::riscv::REG::V9_V10_V11_V12
@ V9_V10_V11_V12
Definition riscv/registers.hpp:408

LIEF::assembly::riscv::REG::V16_V17_V18_V19
@ V16_V17_V18_V19
Definition riscv/registers.hpp:415

LIEF::assembly::riscv::REG::V26_V27_V28_V29_V30
@ V26_V27_V28_V29_V30
Definition riscv/registers.hpp:467

LIEF::assembly::riscv::REG::F15_F
@ F15_F
Definition riscv/registers.hpp:146

LIEF::assembly::riscv::REG::V0M2_V2M2_V4M2
@ V0M2_V2M2_V4M2
Definition riscv/registers.hpp:399

LIEF::assembly::riscv::REG::X6_H
@ X6_H
Definition riscv/registers.hpp:201

LIEF::assembly::riscv::REG::V24_V25_V26_V27_V28_V29_V30
@ V24_V25_V26_V27_V28_V29_V30
Definition riscv/registers.hpp:520

LIEF::assembly::riscv::REG::X6
@ X6
Definition riscv/registers.hpp:73

LIEF::assembly::riscv::REG::V10M2
@ V10M2
Definition riscv/registers.hpp:270

LIEF::assembly::riscv::REG::X19_H
@ X19_H
Definition riscv/registers.hpp:214

LIEF::assembly::riscv::REG::V19_V20
@ V19_V20
Definition riscv/registers.hpp:321

LIEF::assembly::riscv::REG::X7_W
@ X7_W
Definition riscv/registers.hpp:235

LIEF::assembly::riscv::REG::F15_D
@ F15_D
Definition riscv/registers.hpp:114

LIEF::assembly::riscv::REG::V14M2_V16M2
@ V14M2_V16M2
Definition riscv/registers.hpp:340

LIEF::assembly::riscv::REG::V7_V8_V9
@ V7_V8_V9
Definition riscv/registers.hpp:362

LIEF::assembly::riscv::REG::X23_W
@ X23_W
Definition riscv/registers.hpp:251

LIEF::assembly::riscv::REG::V8M4
@ V8M4
Definition riscv/registers.hpp:268

LIEF::assembly::riscv::REG::V2_V3_V4_V5
@ V2_V3_V4_V5
Definition riscv/registers.hpp:401

LIEF::assembly::riscv::REG::V0_V1_V2_V3
@ V0_V1_V2_V3
Definition riscv/registers.hpp:428

LIEF::assembly::riscv::REG::V10M2_V12M2_V14M2
@ V10M2_V12M2_V14M2
Definition riscv/registers.hpp:390

LIEF::assembly::riscv::REG::X22_X23
@ X22_X23
Definition riscv/registers.hpp:298

LIEF::assembly::riscv::REG::V22_V23_V24_V25_V26_V27_V28
@ V22_V23_V24_V25_V26_V27_V28
Definition riscv/registers.hpp:518

LIEF::assembly::riscv::REG::X17
@ X17
Definition riscv/registers.hpp:84

LIEF::assembly::riscv::REG::X20_W
@ X20_W
Definition riscv/registers.hpp:248

LIEF::assembly::riscv::REG::V20M2_V22M2_V24M2
@ V20M2_V22M2_V24M2
Definition riscv/registers.hpp:395

LIEF::assembly::riscv::REG::V1_V2_V3_V4
@ V1_V2_V3_V4
Definition riscv/registers.hpp:400

LIEF::assembly::riscv::REG::V14_V15_V16_V17_V18
@ V14_V15_V16_V17_V18
Definition riscv/registers.hpp:455

LIEF::assembly::riscv::REG::V12_V13_V14_V15_V16
@ V12_V13_V14_V15_V16
Definition riscv/registers.hpp:453

LIEF::assembly::riscv::REG::V8
@ V8
Definition riscv/registers.hpp:43

LIEF::assembly::riscv::REG::V14M2_V16M2_V18M2_V20M2
@ V14M2_V16M2_V18M2_V20M2
Definition riscv/registers.hpp:435

LIEF::assembly::riscv::REG::V20_V21_V22_V23_V24_V25
@ V20_V21_V22_V23_V24_V25
Definition riscv/registers.hpp:489

LIEF::assembly::riscv::REG::V2
@ V2
Definition riscv/registers.hpp:37

LIEF::assembly::riscv::REG::V10_V11_V12_V13_V14
@ V10_V11_V12_V13_V14
Definition riscv/registers.hpp:451

LIEF::assembly::riscv::REG::V8_V9
@ V8_V9
Definition riscv/registers.hpp:310

LIEF::assembly::riscv::REG::F14_H
@ F14_H
Definition riscv/registers.hpp:177

LIEF::assembly::riscv::REG::V2_V3_V4_V5_V6_V7_V8_V9
@ V2_V3_V4_V5_V6_V7_V8_V9
Definition riscv/registers.hpp:524

LIEF::assembly::riscv::REG::F28_D
@ F28_D
Definition riscv/registers.hpp:127

LIEF::assembly::riscv::REG::V0M2_V2M2
@ V0M2_V2M2
Definition riscv/registers.hpp:348

LIEF::assembly::riscv::REG::F31_F
@ F31_F
Definition riscv/registers.hpp:162

LIEF::assembly::riscv::REG::V12M2_V14M2_V16M2_V18M2
@ V12M2_V14M2_V16M2_V18M2
Definition riscv/registers.hpp:434

LIEF::assembly::riscv::REG::F9_D
@ F9_D
Definition riscv/registers.hpp:108

LIEF::assembly::riscv::REG::V14_V15_V16_V17_V18_V19_V20
@ V14_V15_V16_V17_V18_V19_V20
Definition riscv/registers.hpp:510

LIEF::assembly::riscv::REG::V4M2
@ V4M2
Definition riscv/registers.hpp:264

LIEF::assembly::riscv::REG::V25
@ V25
Definition riscv/registers.hpp:60

LIEF::assembly::riscv::REG::V21_V22_V23_V24_V25
@ V21_V22_V23_V24_V25
Definition riscv/registers.hpp:462

LIEF::assembly::riscv::REG::V8_V9_V10_V11_V12_V13
@ V8_V9_V10_V11_V12_V13
Definition riscv/registers.hpp:477

LIEF::assembly::riscv::REG::V19_V20_V21_V22_V23_V24_V25
@ V19_V20_V21_V22_V23_V24_V25
Definition riscv/registers.hpp:515

LIEF::assembly::riscv::REG::V1_V2
@ V1_V2
Definition riscv/registers.hpp:303

LIEF::assembly::riscv::REG::X29_H
@ X29_H
Definition riscv/registers.hpp:224

LIEF::assembly::riscv::REG::F6_D
@ F6_D
Definition riscv/registers.hpp:105

LIEF::assembly::riscv::REG::V18_V19_V20_V21_V22_V23_V24
@ V18_V19_V20_V21_V22_V23_V24
Definition riscv/registers.hpp:514

LIEF::assembly::riscv::REG::V20_V21_V22_V23_V24_V25_V26_V27
@ V20_V21_V22_V23_V24_V25_V26_V27
Definition riscv/registers.hpp:542

LIEF::assembly::riscv::REG::V1_V2_V3_V4_V5_V6
@ V1_V2_V3_V4_V5_V6
Definition riscv/registers.hpp:470

LIEF::assembly::riscv::REG::V1_V2_V3_V4_V5
@ V1_V2_V3_V4_V5
Definition riscv/registers.hpp:442

LIEF::assembly::riscv::REG::V31
@ V31
Definition riscv/registers.hpp:66

LIEF::assembly::riscv::REG::V27
@ V27
Definition riscv/registers.hpp:62

LIEF::assembly::riscv::REG::X10_W
@ X10_W
Definition riscv/registers.hpp:238

LIEF::assembly::riscv::REG::F1_H
@ F1_H
Definition riscv/registers.hpp:164

LIEF::assembly::riscv::REG::V5_V6_V7_V8_V9_V10_V11_V12
@ V5_V6_V7_V8_V9_V10_V11_V12
Definition riscv/registers.hpp:527

LIEF::assembly::riscv::REG::X20_X21
@ X20_X21
Definition riscv/registers.hpp:297

LIEF::assembly::riscv::REG::V20M2_V22M2_V24M2_V26M2
@ V20M2_V22M2_V24M2_V26M2
Definition riscv/registers.hpp:438

LIEF::assembly::riscv::REG::X28
@ X28
Definition riscv/registers.hpp:95

LIEF::assembly::riscv::get_register_name
const char * get_register_name(REG r)

LIEF::assembly
Namespace related to assembly/disassembly support.
Definition Abstract/Binary.hpp:43

LIEF
LIEF namespace.
Definition Abstract/Binary.hpp:36