LIEF: Library to Instrument Executable Formats Version 0.17.0
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riscv/registers.hpp
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1/* Copyright 2022 - 2024 R. Thomas
2 *
3 * Licensed under the Apache License, Version 2.0 (the "License");
4 * you may not use this file except in compliance with the License.
5 * You may obtain a copy of the License at
6 *
7 * http://www.apache.org/licenses/LICENSE-2.0
8 *
9 * Unless required by applicable law or agreed to in writing, software
10 * distributed under the License is distributed on an "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 * See the License for the specific language governing permissions and
13 * limitations under the License.
14 */
15#ifndef LIEF_ASM_RISCV_REGISTER_H
16#define LIEF_ASM_RISCV_REGISTER_H
17namespace LIEF {
18namespace assembly {
19namespace riscv {
20enum class REG;
21const char* get_register_name(REG r);
22
23enum class REG {
24 NoRegister = 0,
25 FFLAGS = 1,
26 FRM = 2,
27 SSP = 3,
28 VCIX_STATE = 4,
29 VL = 5,
30 VLENB = 6,
31 VTYPE = 7,
32 VXRM = 8,
33 VXSAT = 9,
34 DUMMY_REG_PAIR_WITH_X0 = 10,
35 V0 = 11,
36 V1 = 12,
37 V2 = 13,
38 V3 = 14,
39 V4 = 15,
40 V5 = 16,
41 V6 = 17,
42 V7 = 18,
43 V8 = 19,
44 V9 = 20,
45 V10 = 21,
46 V11 = 22,
47 V12 = 23,
48 V13 = 24,
49 V14 = 25,
50 V15 = 26,
51 V16 = 27,
52 V17 = 28,
53 V18 = 29,
54 V19 = 30,
55 V20 = 31,
56 V21 = 32,
57 V22 = 33,
58 V23 = 34,
59 V24 = 35,
60 V25 = 36,
61 V26 = 37,
62 V27 = 38,
63 V28 = 39,
64 V29 = 40,
65 V30 = 41,
66 V31 = 42,
67 X0 = 43,
68 X1 = 44,
69 X2 = 45,
70 X3 = 46,
71 X4 = 47,
72 X5 = 48,
73 X6 = 49,
74 X7 = 50,
75 X8 = 51,
76 X9 = 52,
77 X10 = 53,
78 X11 = 54,
79 X12 = 55,
80 X13 = 56,
81 X14 = 57,
82 X15 = 58,
83 X16 = 59,
84 X17 = 60,
85 X18 = 61,
86 X19 = 62,
87 X20 = 63,
88 X21 = 64,
89 X22 = 65,
90 X23 = 66,
91 X24 = 67,
92 X25 = 68,
93 X26 = 69,
94 X27 = 70,
95 X28 = 71,
96 X29 = 72,
97 X30 = 73,
98 X31 = 74,
99 F0_D = 75,
100 F1_D = 76,
101 F2_D = 77,
102 F3_D = 78,
103 F4_D = 79,
104 F5_D = 80,
105 F6_D = 81,
106 F7_D = 82,
107 F8_D = 83,
108 F9_D = 84,
109 F10_D = 85,
110 F11_D = 86,
111 F12_D = 87,
112 F13_D = 88,
113 F14_D = 89,
114 F15_D = 90,
115 F16_D = 91,
116 F17_D = 92,
117 F18_D = 93,
118 F19_D = 94,
119 F20_D = 95,
120 F21_D = 96,
121 F22_D = 97,
122 F23_D = 98,
123 F24_D = 99,
124 F25_D = 100,
125 F26_D = 101,
126 F27_D = 102,
127 F28_D = 103,
128 F29_D = 104,
129 F30_D = 105,
130 F31_D = 106,
131 F0_F = 107,
132 F1_F = 108,
133 F2_F = 109,
134 F3_F = 110,
135 F4_F = 111,
136 F5_F = 112,
137 F6_F = 113,
138 F7_F = 114,
139 F8_F = 115,
140 F9_F = 116,
141 F10_F = 117,
142 F11_F = 118,
143 F12_F = 119,
144 F13_F = 120,
145 F14_F = 121,
146 F15_F = 122,
147 F16_F = 123,
148 F17_F = 124,
149 F18_F = 125,
150 F19_F = 126,
151 F20_F = 127,
152 F21_F = 128,
153 F22_F = 129,
154 F23_F = 130,
155 F24_F = 131,
156 F25_F = 132,
157 F26_F = 133,
158 F27_F = 134,
159 F28_F = 135,
160 F29_F = 136,
161 F30_F = 137,
162 F31_F = 138,
163 F0_H = 139,
164 F1_H = 140,
165 F2_H = 141,
166 F3_H = 142,
167 F4_H = 143,
168 F5_H = 144,
169 F6_H = 145,
170 F7_H = 146,
171 F8_H = 147,
172 F9_H = 148,
173 F10_H = 149,
174 F11_H = 150,
175 F12_H = 151,
176 F13_H = 152,
177 F14_H = 153,
178 F15_H = 154,
179 F16_H = 155,
180 F17_H = 156,
181 F18_H = 157,
182 F19_H = 158,
183 F20_H = 159,
184 F21_H = 160,
185 F22_H = 161,
186 F23_H = 162,
187 F24_H = 163,
188 F25_H = 164,
189 F26_H = 165,
190 F27_H = 166,
191 F28_H = 167,
192 F29_H = 168,
193 F30_H = 169,
194 F31_H = 170,
195 X0_Pair = 171,
196 V0M2 = 172,
197 V0M4 = 173,
198 V0M8 = 174,
199 V2M2 = 175,
200 V4M2 = 176,
201 V4M4 = 177,
202 V6M2 = 178,
203 V8M2 = 179,
204 V8M4 = 180,
205 V8M8 = 181,
206 V10M2 = 182,
207 V12M2 = 183,
208 V12M4 = 184,
209 V14M2 = 185,
210 V16M2 = 186,
211 V16M4 = 187,
212 V16M8 = 188,
213 V18M2 = 189,
214 V20M2 = 190,
215 V20M4 = 191,
216 V22M2 = 192,
217 V24M2 = 193,
218 V24M4 = 194,
219 V24M8 = 195,
220 V26M2 = 196,
221 V28M2 = 197,
222 V28M4 = 198,
223 V30M2 = 199,
224 X2_X3 = 200,
225 X4_X5 = 201,
226 X6_X7 = 202,
227 X8_X9 = 203,
228 X10_X11 = 204,
229 X12_X13 = 205,
230 X14_X15 = 206,
231 X16_X17 = 207,
232 X18_X19 = 208,
233 X20_X21 = 209,
234 X22_X23 = 210,
235 X24_X25 = 211,
236 X26_X27 = 212,
237 X28_X29 = 213,
238 X30_X31 = 214,
239 V1_V2 = 215,
240 V2_V3 = 216,
241 V3_V4 = 217,
242 V4_V5 = 218,
243 V5_V6 = 219,
244 V6_V7 = 220,
245 V7_V8 = 221,
246 V8_V9 = 222,
247 V9_V10 = 223,
248 V10_V11 = 224,
249 V11_V12 = 225,
250 V12_V13 = 226,
251 V13_V14 = 227,
252 V14_V15 = 228,
253 V15_V16 = 229,
254 V16_V17 = 230,
255 V17_V18 = 231,
256 V18_V19 = 232,
257 V19_V20 = 233,
258 V20_V21 = 234,
259 V21_V22 = 235,
260 V22_V23 = 236,
261 V23_V24 = 237,
262 V24_V25 = 238,
263 V25_V26 = 239,
264 V26_V27 = 240,
265 V27_V28 = 241,
266 V28_V29 = 242,
267 V29_V30 = 243,
268 V30_V31 = 244,
269 V0_V1 = 245,
270 V2M2_V4M2 = 246,
271 V4M2_V6M2 = 247,
272 V6M2_V8M2 = 248,
273 V8M2_V10M2 = 249,
274 V10M2_V12M2 = 250,
275 V12M2_V14M2 = 251,
276 V14M2_V16M2 = 252,
277 V16M2_V18M2 = 253,
278 V18M2_V20M2 = 254,
279 V20M2_V22M2 = 255,
280 V22M2_V24M2 = 256,
281 V24M2_V26M2 = 257,
282 V26M2_V28M2 = 258,
283 V28M2_V30M2 = 259,
284 V0M2_V2M2 = 260,
285 V4M4_V8M4 = 261,
286 V8M4_V12M4 = 262,
287 V12M4_V16M4 = 263,
288 V16M4_V20M4 = 264,
289 V20M4_V24M4 = 265,
290 V24M4_V28M4 = 266,
291 V0M4_V4M4 = 267,
292 V1_V2_V3 = 268,
293 V2_V3_V4 = 269,
294 V3_V4_V5 = 270,
295 V4_V5_V6 = 271,
296 V5_V6_V7 = 272,
297 V6_V7_V8 = 273,
298 V7_V8_V9 = 274,
299 V8_V9_V10 = 275,
300 V9_V10_V11 = 276,
301 V10_V11_V12 = 277,
302 V11_V12_V13 = 278,
303 V12_V13_V14 = 279,
304 V13_V14_V15 = 280,
305 V14_V15_V16 = 281,
306 V15_V16_V17 = 282,
307 V16_V17_V18 = 283,
308 V17_V18_V19 = 284,
309 V18_V19_V20 = 285,
310 V19_V20_V21 = 286,
311 V20_V21_V22 = 287,
312 V21_V22_V23 = 288,
313 V22_V23_V24 = 289,
314 V23_V24_V25 = 290,
315 V24_V25_V26 = 291,
316 V25_V26_V27 = 292,
317 V26_V27_V28 = 293,
318 V27_V28_V29 = 294,
319 V28_V29_V30 = 295,
320 V29_V30_V31 = 296,
321 V0_V1_V2 = 297,
322 V2M2_V4M2_V6M2 = 298,
323 V4M2_V6M2_V8M2 = 299,
324 V6M2_V8M2_V10M2 = 300,
325 V8M2_V10M2_V12M2 = 301,
326 V10M2_V12M2_V14M2 = 302,
327 V12M2_V14M2_V16M2 = 303,
328 V14M2_V16M2_V18M2 = 304,
329 V16M2_V18M2_V20M2 = 305,
330 V18M2_V20M2_V22M2 = 306,
331 V20M2_V22M2_V24M2 = 307,
332 V22M2_V24M2_V26M2 = 308,
333 V24M2_V26M2_V28M2 = 309,
334 V26M2_V28M2_V30M2 = 310,
335 V0M2_V2M2_V4M2 = 311,
336 V1_V2_V3_V4 = 312,
337 V2_V3_V4_V5 = 313,
338 V3_V4_V5_V6 = 314,
339 V4_V5_V6_V7 = 315,
340 V5_V6_V7_V8 = 316,
341 V6_V7_V8_V9 = 317,
342 V7_V8_V9_V10 = 318,
343 V8_V9_V10_V11 = 319,
344 V9_V10_V11_V12 = 320,
345 V10_V11_V12_V13 = 321,
346 V11_V12_V13_V14 = 322,
347 V12_V13_V14_V15 = 323,
348 V13_V14_V15_V16 = 324,
349 V14_V15_V16_V17 = 325,
350 V15_V16_V17_V18 = 326,
351 V16_V17_V18_V19 = 327,
352 V17_V18_V19_V20 = 328,
353 V18_V19_V20_V21 = 329,
354 V19_V20_V21_V22 = 330,
355 V20_V21_V22_V23 = 331,
356 V21_V22_V23_V24 = 332,
357 V22_V23_V24_V25 = 333,
358 V23_V24_V25_V26 = 334,
359 V24_V25_V26_V27 = 335,
360 V25_V26_V27_V28 = 336,
361 V26_V27_V28_V29 = 337,
362 V27_V28_V29_V30 = 338,
363 V28_V29_V30_V31 = 339,
364 V0_V1_V2_V3 = 340,
365 V2M2_V4M2_V6M2_V8M2 = 341,
366 V4M2_V6M2_V8M2_V10M2 = 342,
367 V6M2_V8M2_V10M2_V12M2 = 343,
368 V8M2_V10M2_V12M2_V14M2 = 344,
369 V10M2_V12M2_V14M2_V16M2 = 345,
370 V12M2_V14M2_V16M2_V18M2 = 346,
371 V14M2_V16M2_V18M2_V20M2 = 347,
372 V16M2_V18M2_V20M2_V22M2 = 348,
373 V18M2_V20M2_V22M2_V24M2 = 349,
374 V20M2_V22M2_V24M2_V26M2 = 350,
375 V22M2_V24M2_V26M2_V28M2 = 351,
376 V24M2_V26M2_V28M2_V30M2 = 352,
377 V0M2_V2M2_V4M2_V6M2 = 353,
378 V1_V2_V3_V4_V5 = 354,
379 V2_V3_V4_V5_V6 = 355,
380 V3_V4_V5_V6_V7 = 356,
381 V4_V5_V6_V7_V8 = 357,
382 V5_V6_V7_V8_V9 = 358,
383 V6_V7_V8_V9_V10 = 359,
384 V7_V8_V9_V10_V11 = 360,
385 V8_V9_V10_V11_V12 = 361,
386 V9_V10_V11_V12_V13 = 362,
387 V10_V11_V12_V13_V14 = 363,
388 V11_V12_V13_V14_V15 = 364,
389 V12_V13_V14_V15_V16 = 365,
390 V13_V14_V15_V16_V17 = 366,
391 V14_V15_V16_V17_V18 = 367,
392 V15_V16_V17_V18_V19 = 368,
393 V16_V17_V18_V19_V20 = 369,
394 V17_V18_V19_V20_V21 = 370,
395 V18_V19_V20_V21_V22 = 371,
396 V19_V20_V21_V22_V23 = 372,
397 V20_V21_V22_V23_V24 = 373,
398 V21_V22_V23_V24_V25 = 374,
399 V22_V23_V24_V25_V26 = 375,
400 V23_V24_V25_V26_V27 = 376,
401 V24_V25_V26_V27_V28 = 377,
402 V25_V26_V27_V28_V29 = 378,
403 V26_V27_V28_V29_V30 = 379,
404 V27_V28_V29_V30_V31 = 380,
405 V0_V1_V2_V3_V4 = 381,
406 V1_V2_V3_V4_V5_V6 = 382,
407 V2_V3_V4_V5_V6_V7 = 383,
408 V3_V4_V5_V6_V7_V8 = 384,
409 V4_V5_V6_V7_V8_V9 = 385,
410 V5_V6_V7_V8_V9_V10 = 386,
411 V6_V7_V8_V9_V10_V11 = 387,
412 V7_V8_V9_V10_V11_V12 = 388,
413 V8_V9_V10_V11_V12_V13 = 389,
414 V9_V10_V11_V12_V13_V14 = 390,
415 V10_V11_V12_V13_V14_V15 = 391,
416 V11_V12_V13_V14_V15_V16 = 392,
417 V12_V13_V14_V15_V16_V17 = 393,
418 V13_V14_V15_V16_V17_V18 = 394,
419 V14_V15_V16_V17_V18_V19 = 395,
420 V15_V16_V17_V18_V19_V20 = 396,
421 V16_V17_V18_V19_V20_V21 = 397,
422 V17_V18_V19_V20_V21_V22 = 398,
423 V18_V19_V20_V21_V22_V23 = 399,
424 V19_V20_V21_V22_V23_V24 = 400,
425 V20_V21_V22_V23_V24_V25 = 401,
426 V21_V22_V23_V24_V25_V26 = 402,
427 V22_V23_V24_V25_V26_V27 = 403,
428 V23_V24_V25_V26_V27_V28 = 404,
429 V24_V25_V26_V27_V28_V29 = 405,
430 V25_V26_V27_V28_V29_V30 = 406,
431 V26_V27_V28_V29_V30_V31 = 407,
432 V0_V1_V2_V3_V4_V5 = 408,
433 V1_V2_V3_V4_V5_V6_V7 = 409,
434 V2_V3_V4_V5_V6_V7_V8 = 410,
435 V3_V4_V5_V6_V7_V8_V9 = 411,
436 V4_V5_V6_V7_V8_V9_V10 = 412,
437 V5_V6_V7_V8_V9_V10_V11 = 413,
438 V6_V7_V8_V9_V10_V11_V12 = 414,
439 V7_V8_V9_V10_V11_V12_V13 = 415,
440 V8_V9_V10_V11_V12_V13_V14 = 416,
441 V9_V10_V11_V12_V13_V14_V15 = 417,
442 V10_V11_V12_V13_V14_V15_V16 = 418,
443 V11_V12_V13_V14_V15_V16_V17 = 419,
444 V12_V13_V14_V15_V16_V17_V18 = 420,
445 V13_V14_V15_V16_V17_V18_V19 = 421,
446 V14_V15_V16_V17_V18_V19_V20 = 422,
447 V15_V16_V17_V18_V19_V20_V21 = 423,
448 V16_V17_V18_V19_V20_V21_V22 = 424,
449 V17_V18_V19_V20_V21_V22_V23 = 425,
450 V18_V19_V20_V21_V22_V23_V24 = 426,
451 V19_V20_V21_V22_V23_V24_V25 = 427,
452 V20_V21_V22_V23_V24_V25_V26 = 428,
453 V21_V22_V23_V24_V25_V26_V27 = 429,
454 V22_V23_V24_V25_V26_V27_V28 = 430,
455 V23_V24_V25_V26_V27_V28_V29 = 431,
456 V24_V25_V26_V27_V28_V29_V30 = 432,
457 V25_V26_V27_V28_V29_V30_V31 = 433,
458 V0_V1_V2_V3_V4_V5_V6 = 434,
459 V1_V2_V3_V4_V5_V6_V7_V8 = 435,
460 V2_V3_V4_V5_V6_V7_V8_V9 = 436,
461 V3_V4_V5_V6_V7_V8_V9_V10 = 437,
462 V4_V5_V6_V7_V8_V9_V10_V11 = 438,
463 V5_V6_V7_V8_V9_V10_V11_V12 = 439,
464 V6_V7_V8_V9_V10_V11_V12_V13 = 440,
465 V7_V8_V9_V10_V11_V12_V13_V14 = 441,
466 V8_V9_V10_V11_V12_V13_V14_V15 = 442,
467 V9_V10_V11_V12_V13_V14_V15_V16 = 443,
468 V10_V11_V12_V13_V14_V15_V16_V17 = 444,
469 V11_V12_V13_V14_V15_V16_V17_V18 = 445,
470 V12_V13_V14_V15_V16_V17_V18_V19 = 446,
471 V13_V14_V15_V16_V17_V18_V19_V20 = 447,
472 V14_V15_V16_V17_V18_V19_V20_V21 = 448,
473 V15_V16_V17_V18_V19_V20_V21_V22 = 449,
474 V16_V17_V18_V19_V20_V21_V22_V23 = 450,
475 V17_V18_V19_V20_V21_V22_V23_V24 = 451,
476 V18_V19_V20_V21_V22_V23_V24_V25 = 452,
477 V19_V20_V21_V22_V23_V24_V25_V26 = 453,
478 V20_V21_V22_V23_V24_V25_V26_V27 = 454,
479 V21_V22_V23_V24_V25_V26_V27_V28 = 455,
480 V22_V23_V24_V25_V26_V27_V28_V29 = 456,
481 V23_V24_V25_V26_V27_V28_V29_V30 = 457,
482 V24_V25_V26_V27_V28_V29_V30_V31 = 458,
483 V0_V1_V2_V3_V4_V5_V6_V7 = 459,
484 NUM_TARGET_REGS = 460,
485};
486
487}
488}
489}
490#endif
LIEF::assembly::riscv
RISC-V architecture-related namespace.
Definition riscv/Instruction.hpp:26
LIEF::assembly::riscv::REG
REG
Definition riscv/registers.hpp:23
LIEF::assembly::riscv::REG::V24M2_V26M2_V28M2
@ V24M2_V26M2_V28M2
Definition riscv/registers.hpp:333
LIEF::assembly::riscv::REG::V12M4
@ V12M4
Definition riscv/registers.hpp:208
LIEF::assembly::riscv::REG::V16_V17_V18_V19_V20_V21_V22_V23
@ V16_V17_V18_V19_V20_V21_V22_V23
Definition riscv/registers.hpp:474
LIEF::assembly::riscv::REG::V9_V10
@ V9_V10
Definition riscv/registers.hpp:247
LIEF::assembly::riscv::REG::V17_V18_V19_V20_V21_V22_V23_V24
@ V17_V18_V19_V20_V21_V22_V23_V24
Definition riscv/registers.hpp:475
LIEF::assembly::riscv::REG::V7
@ V7
Definition riscv/registers.hpp:42
LIEF::assembly::riscv::REG::V18M2_V20M2
@ V18M2_V20M2
Definition riscv/registers.hpp:278
LIEF::assembly::riscv::REG::V3_V4
@ V3_V4
Definition riscv/registers.hpp:241
LIEF::assembly::riscv::REG::V2M2
@ V2M2
Definition riscv/registers.hpp:199
LIEF::assembly::riscv::REG::V5_V6_V7_V8_V9_V10
@ V5_V6_V7_V8_V9_V10
Definition riscv/registers.hpp:410
LIEF::assembly::riscv::REG::F13_F
@ F13_F
Definition riscv/registers.hpp:144
LIEF::assembly::riscv::REG::V20M2_V22M2
@ V20M2_V22M2
Definition riscv/registers.hpp:279
LIEF::assembly::riscv::REG::X3
@ X3
Definition riscv/registers.hpp:70
LIEF::assembly::riscv::REG::V18_V19
@ V18_V19
Definition riscv/registers.hpp:256
LIEF::assembly::riscv::REG::V28M2_V30M2
@ V28M2_V30M2
Definition riscv/registers.hpp:283
LIEF::assembly::riscv::REG::V14_V15_V16_V17_V18_V19
@ V14_V15_V16_V17_V18_V19
Definition riscv/registers.hpp:419
LIEF::assembly::riscv::REG::V3_V4_V5_V6_V7_V8
@ V3_V4_V5_V6_V7_V8
Definition riscv/registers.hpp:408
LIEF::assembly::riscv::REG::V0M4
@ V0M4
Definition riscv/registers.hpp:197
LIEF::assembly::riscv::REG::V18_V19_V20_V21_V22
@ V18_V19_V20_V21_V22
Definition riscv/registers.hpp:395
LIEF::assembly::riscv::REG::V16M2_V18M2_V20M2
@ V16M2_V18M2_V20M2
Definition riscv/registers.hpp:329
LIEF::assembly::riscv::REG::V16M2
@ V16M2
Definition riscv/registers.hpp:210
LIEF::assembly::riscv::REG::X2_X3
@ X2_X3
Definition riscv/registers.hpp:224
LIEF::assembly::riscv::REG::VXRM
@ VXRM
Definition riscv/registers.hpp:32
LIEF::assembly::riscv::REG::V22_V23_V24_V25_V26_V27
@ V22_V23_V24_V25_V26_V27
Definition riscv/registers.hpp:427
LIEF::assembly::riscv::REG::F6_F
@ F6_F
Definition riscv/registers.hpp:137
LIEF::assembly::riscv::REG::F11_D
@ F11_D
Definition riscv/registers.hpp:110
LIEF::assembly::riscv::REG::F16_F
@ F16_F
Definition riscv/registers.hpp:147
LIEF::assembly::riscv::REG::V24
@ V24
Definition riscv/registers.hpp:59
LIEF::assembly::riscv::REG::V24M2_V26M2
@ V24M2_V26M2
Definition riscv/registers.hpp:281
LIEF::assembly::riscv::REG::V14_V15_V16_V17
@ V14_V15_V16_V17
Definition riscv/registers.hpp:349
LIEF::assembly::riscv::REG::V23_V24_V25_V26_V27_V28_V29_V30
@ V23_V24_V25_V26_V27_V28_V29_V30
Definition riscv/registers.hpp:481
LIEF::assembly::riscv::REG::V28
@ V28
Definition riscv/registers.hpp:63
LIEF::assembly::riscv::REG::V18_V19_V20_V21_V22_V23
@ V18_V19_V20_V21_V22_V23
Definition riscv/registers.hpp:423
LIEF::assembly::riscv::REG::V11_V12_V13_V14_V15_V16_V17_V18
@ V11_V12_V13_V14_V15_V16_V17_V18
Definition riscv/registers.hpp:469
LIEF::assembly::riscv::REG::V7_V8_V9_V10_V11_V12_V13
@ V7_V8_V9_V10_V11_V12_V13
Definition riscv/registers.hpp:439
LIEF::assembly::riscv::REG::V23_V24_V25_V26_V27
@ V23_V24_V25_V26_V27
Definition riscv/registers.hpp:400
LIEF::assembly::riscv::REG::F3_F
@ F3_F
Definition riscv/registers.hpp:134
LIEF::assembly::riscv::REG::V26_V27
@ V26_V27
Definition riscv/registers.hpp:264
LIEF::assembly::riscv::REG::F14_D
@ F14_D
Definition riscv/registers.hpp:113
LIEF::assembly::riscv::REG::F9_F
@ F9_F
Definition riscv/registers.hpp:140
LIEF::assembly::riscv::REG::F2_H
@ F2_H
Definition riscv/registers.hpp:165
LIEF::assembly::riscv::REG::V0
@ V0
Definition riscv/registers.hpp:35
LIEF::assembly::riscv::REG::V18_V19_V20_V21_V22_V23_V24_V25
@ V18_V19_V20_V21_V22_V23_V24_V25
Definition riscv/registers.hpp:476
LIEF::assembly::riscv::REG::V14_V15
@ V14_V15
Definition riscv/registers.hpp:252
LIEF::assembly::riscv::REG::V2M2_V4M2_V6M2_V8M2
@ V2M2_V4M2_V6M2_V8M2
Definition riscv/registers.hpp:365
LIEF::assembly::riscv::REG::V18M2_V20M2_V22M2
@ V18M2_V20M2_V22M2
Definition riscv/registers.hpp:330
LIEF::assembly::riscv::REG::V4_V5_V6_V7_V8_V9_V10_V11
@ V4_V5_V6_V7_V8_V9_V10_V11
Definition riscv/registers.hpp:462
LIEF::assembly::riscv::REG::V16M2_V18M2
@ V16M2_V18M2
Definition riscv/registers.hpp:277
LIEF::assembly::riscv::REG::V24M4
@ V24M4
Definition riscv/registers.hpp:218
LIEF::assembly::riscv::REG::V28_V29_V30
@ V28_V29_V30
Definition riscv/registers.hpp:319
LIEF::assembly::riscv::REG::V12M4_V16M4
@ V12M4_V16M4
Definition riscv/registers.hpp:287
LIEF::assembly::riscv::REG::F11_H
@ F11_H
Definition riscv/registers.hpp:174
LIEF::assembly::riscv::REG::V3_V4_V5
@ V3_V4_V5
Definition riscv/registers.hpp:294
LIEF::assembly::riscv::REG::X28_X29
@ X28_X29
Definition riscv/registers.hpp:237
LIEF::assembly::riscv::REG::V27_V28_V29_V30
@ V27_V28_V29_V30
Definition riscv/registers.hpp:362
LIEF::assembly::riscv::REG::F0_D
@ F0_D
Definition riscv/registers.hpp:99
LIEF::assembly::riscv::REG::F27_F
@ F27_F
Definition riscv/registers.hpp:158
LIEF::assembly::riscv::REG::V10M2_V12M2_V14M2_V16M2
@ V10M2_V12M2_V14M2_V16M2
Definition riscv/registers.hpp:369
LIEF::assembly::riscv::REG::F18_F
@ F18_F
Definition riscv/registers.hpp:149
LIEF::assembly::riscv::REG::F5_D
@ F5_D
Definition riscv/registers.hpp:104
LIEF::assembly::riscv::REG::V3_V4_V5_V6_V7_V8_V9_V10
@ V3_V4_V5_V6_V7_V8_V9_V10
Definition riscv/registers.hpp:461
LIEF::assembly::riscv::REG::V23_V24_V25_V26_V27_V28
@ V23_V24_V25_V26_V27_V28
Definition riscv/registers.hpp:428
LIEF::assembly::riscv::REG::V24M2_V26M2_V28M2_V30M2
@ V24M2_V26M2_V28M2_V30M2
Definition riscv/registers.hpp:376
LIEF::assembly::riscv::REG::F17_H
@ F17_H
Definition riscv/registers.hpp:180
LIEF::assembly::riscv::REG::F10_D
@ F10_D
Definition riscv/registers.hpp:109
LIEF::assembly::riscv::REG::V0_V1_V2
@ V0_V1_V2
Definition riscv/registers.hpp:321
LIEF::assembly::riscv::REG::V25_V26_V27_V28_V29
@ V25_V26_V27_V28_V29
Definition riscv/registers.hpp:402
LIEF::assembly::riscv::REG::V13_V14_V15_V16_V17_V18
@ V13_V14_V15_V16_V17_V18
Definition riscv/registers.hpp:418
LIEF::assembly::riscv::REG::V19_V20_V21_V22_V23
@ V19_V20_V21_V22_V23
Definition riscv/registers.hpp:396
LIEF::assembly::riscv::REG::F12_D
@ F12_D
Definition riscv/registers.hpp:111
LIEF::assembly::riscv::REG::X0_Pair
@ X0_Pair
Definition riscv/registers.hpp:195
LIEF::assembly::riscv::REG::F10_H
@ F10_H
Definition riscv/registers.hpp:173
LIEF::assembly::riscv::REG::F0_F
@ F0_F
Definition riscv/registers.hpp:131
LIEF::assembly::riscv::REG::X19
@ X19
Definition riscv/registers.hpp:86
LIEF::assembly::riscv::REG::V20M4
@ V20M4
Definition riscv/registers.hpp:215
LIEF::assembly::riscv::REG::F18_H
@ F18_H
Definition riscv/registers.hpp:181
LIEF::assembly::riscv::REG::V0_V1_V2_V3_V4_V5_V6
@ V0_V1_V2_V3_V4_V5_V6
Definition riscv/registers.hpp:458
LIEF::assembly::riscv::REG::F13_H
@ F13_H
Definition riscv/registers.hpp:176
LIEF::assembly::riscv::REG::V15_V16_V17_V18_V19
@ V15_V16_V17_V18_V19
Definition riscv/registers.hpp:392
LIEF::assembly::riscv::REG::V1_V2_V3_V4_V5_V6_V7
@ V1_V2_V3_V4_V5_V6_V7
Definition riscv/registers.hpp:433
LIEF::assembly::riscv::REG::V26
@ V26
Definition riscv/registers.hpp:61
LIEF::assembly::riscv::REG::F24_F
@ F24_F
Definition riscv/registers.hpp:155
LIEF::assembly::riscv::REG::V2M2_V4M2_V6M2
@ V2M2_V4M2_V6M2
Definition riscv/registers.hpp:322
LIEF::assembly::riscv::REG::V26_V27_V28_V29_V30_V31
@ V26_V27_V28_V29_V30_V31
Definition riscv/registers.hpp:431
LIEF::assembly::riscv::REG::V23
@ V23
Definition riscv/registers.hpp:58
LIEF::assembly::riscv::REG::F23_F
@ F23_F
Definition riscv/registers.hpp:154
LIEF::assembly::riscv::REG::V8M8
@ V8M8
Definition riscv/registers.hpp:205
LIEF::assembly::riscv::REG::V12M2_V14M2
@ V12M2_V14M2
Definition riscv/registers.hpp:275
LIEF::assembly::riscv::REG::V26M2_V28M2_V30M2
@ V26M2_V28M2_V30M2
Definition riscv/registers.hpp:334
LIEF::assembly::riscv::REG::V6_V7_V8_V9_V10
@ V6_V7_V8_V9_V10
Definition riscv/registers.hpp:383
LIEF::assembly::riscv::REG::F31_H
@ F31_H
Definition riscv/registers.hpp:194
LIEF::assembly::riscv::REG::V18M2_V20M2_V22M2_V24M2
@ V18M2_V20M2_V22M2_V24M2
Definition riscv/registers.hpp:373
LIEF::assembly::riscv::REG::V16_V17_V18
@ V16_V17_V18
Definition riscv/registers.hpp:307
LIEF::assembly::riscv::REG::V28_V29
@ V28_V29
Definition riscv/registers.hpp:266
LIEF::assembly::riscv::REG::V6_V7_V8_V9_V10_V11_V12
@ V6_V7_V8_V9_V10_V11_V12
Definition riscv/registers.hpp:438
LIEF::assembly::riscv::REG::F13_D
@ F13_D
Definition riscv/registers.hpp:112
LIEF::assembly::riscv::REG::V12_V13
@ V12_V13
Definition riscv/registers.hpp:250
LIEF::assembly::riscv::REG::V25_V26_V27_V28_V29_V30_V31
@ V25_V26_V27_V28_V29_V30_V31
Definition riscv/registers.hpp:457
LIEF::assembly::riscv::REG::V6_V7_V8
@ V6_V7_V8
Definition riscv/registers.hpp:297
LIEF::assembly::riscv::REG::V2_V3_V4_V5_V6_V7_V8
@ V2_V3_V4_V5_V6_V7_V8
Definition riscv/registers.hpp:434
LIEF::assembly::riscv::REG::V6_V7_V8_V9
@ V6_V7_V8_V9
Definition riscv/registers.hpp:341
LIEF::assembly::riscv::REG::V15_V16_V17_V18_V19_V20
@ V15_V16_V17_V18_V19_V20
Definition riscv/registers.hpp:420
LIEF::assembly::riscv::REG::V15_V16_V17_V18_V19_V20_V21
@ V15_V16_V17_V18_V19_V20_V21
Definition riscv/registers.hpp:447
LIEF::assembly::riscv::REG::V2_V3_V4_V5_V6_V7
@ V2_V3_V4_V5_V6_V7
Definition riscv/registers.hpp:407
LIEF::assembly::riscv::REG::V17_V18_V19_V20_V21_V22
@ V17_V18_V19_V20_V21_V22
Definition riscv/registers.hpp:422
LIEF::assembly::riscv::REG::F24_H
@ F24_H
Definition riscv/registers.hpp:187
LIEF::assembly::riscv::REG::F2_D
@ F2_D
Definition riscv/registers.hpp:101
LIEF::assembly::riscv::REG::V24_V25
@ V24_V25
Definition riscv/registers.hpp:262
LIEF::assembly::riscv::REG::V17
@ V17
Definition riscv/registers.hpp:52
LIEF::assembly::riscv::REG::F26_H
@ F26_H
Definition riscv/registers.hpp:189
LIEF::assembly::riscv::REG::V27_V28_V29_V30_V31
@ V27_V28_V29_V30_V31
Definition riscv/registers.hpp:404
LIEF::assembly::riscv::REG::F1_F
@ F1_F
Definition riscv/registers.hpp:132
LIEF::assembly::riscv::REG::V7_V8
@ V7_V8
Definition riscv/registers.hpp:245
LIEF::assembly::riscv::REG::V16M4
@ V16M4
Definition riscv/registers.hpp:211
LIEF::assembly::riscv::REG::NUM_TARGET_REGS
@ NUM_TARGET_REGS
Definition riscv/registers.hpp:484
LIEF::assembly::riscv::REG::V13_V14_V15
@ V13_V14_V15
Definition riscv/registers.hpp:304
LIEF::assembly::riscv::REG::V16
@ V16
Definition riscv/registers.hpp:51
LIEF::assembly::riscv::REG::V15_V16_V17_V18_V19_V20_V21_V22
@ V15_V16_V17_V18_V19_V20_V21_V22
Definition riscv/registers.hpp:473
LIEF::assembly::riscv::REG::F4_H
@ F4_H
Definition riscv/registers.hpp:167
LIEF::assembly::riscv::REG::F16_D
@ F16_D
Definition riscv/registers.hpp:115
LIEF::assembly::riscv::REG::V23_V24
@ V23_V24
Definition riscv/registers.hpp:261
LIEF::assembly::riscv::REG::F30_D
@ F30_D
Definition riscv/registers.hpp:129
LIEF::assembly::riscv::REG::V8_V9_V10_V11_V12_V13_V14_V15
@ V8_V9_V10_V11_V12_V13_V14_V15
Definition riscv/registers.hpp:466
LIEF::assembly::riscv::REG::V9_V10_V11_V12_V13_V14_V15
@ V9_V10_V11_V12_V13_V14_V15
Definition riscv/registers.hpp:441
LIEF::assembly::riscv::REG::V10
@ V10
Definition riscv/registers.hpp:45
LIEF::assembly::riscv::REG::F12_F
@ F12_F
Definition riscv/registers.hpp:143
LIEF::assembly::riscv::REG::V15
@ V15
Definition riscv/registers.hpp:50
LIEF::assembly::riscv::REG::V4_V5_V6_V7_V8_V9_V10
@ V4_V5_V6_V7_V8_V9_V10
Definition riscv/registers.hpp:436
LIEF::assembly::riscv::REG::V18M2
@ V18M2
Definition riscv/registers.hpp:213
LIEF::assembly::riscv::REG::F7_H
@ F7_H
Definition riscv/registers.hpp:170
LIEF::assembly::riscv::REG::V22_V23_V24
@ V22_V23_V24
Definition riscv/registers.hpp:313
LIEF::assembly::riscv::REG::V9
@ V9
Definition riscv/registers.hpp:44
LIEF::assembly::riscv::REG::V9_V10_V11_V12_V13_V14_V15_V16
@ V9_V10_V11_V12_V13_V14_V15_V16
Definition riscv/registers.hpp:467
LIEF::assembly::riscv::REG::V28_V29_V30_V31
@ V28_V29_V30_V31
Definition riscv/registers.hpp:363
LIEF::assembly::riscv::REG::X21
@ X21
Definition riscv/registers.hpp:88
LIEF::assembly::riscv::REG::V8_V9_V10
@ V8_V9_V10
Definition riscv/registers.hpp:299
LIEF::assembly::riscv::REG::V30
@ V30
Definition riscv/registers.hpp:65
LIEF::assembly::riscv::REG::V21_V22_V23_V24
@ V21_V22_V23_V24
Definition riscv/registers.hpp:356
LIEF::assembly::riscv::REG::V17_V18_V19
@ V17_V18_V19
Definition riscv/registers.hpp:308
LIEF::assembly::riscv::REG::V29_V30_V31
@ V29_V30_V31
Definition riscv/registers.hpp:320
LIEF::assembly::riscv::REG::X23
@ X23
Definition riscv/registers.hpp:90
LIEF::assembly::riscv::REG::V13_V14_V15_V16_V17_V18_V19
@ V13_V14_V15_V16_V17_V18_V19
Definition riscv/registers.hpp:445
LIEF::assembly::riscv::REG::V19
@ V19
Definition riscv/registers.hpp:54
LIEF::assembly::riscv::REG::V3_V4_V5_V6_V7_V8_V9
@ V3_V4_V5_V6_V7_V8_V9
Definition riscv/registers.hpp:435
LIEF::assembly::riscv::REG::X22
@ X22
Definition riscv/registers.hpp:89
LIEF::assembly::riscv::REG::F26_D
@ F26_D
Definition riscv/registers.hpp:125
LIEF::assembly::riscv::REG::V0_V1
@ V0_V1
Definition riscv/registers.hpp:269
LIEF::assembly::riscv::REG::V11_V12_V13_V14
@ V11_V12_V13_V14
Definition riscv/registers.hpp:346
LIEF::assembly::riscv::REG::X5
@ X5
Definition riscv/registers.hpp:72
LIEF::assembly::riscv::REG::F19_H
@ F19_H
Definition riscv/registers.hpp:182
LIEF::assembly::riscv::REG::V22
@ V22
Definition riscv/registers.hpp:57
LIEF::assembly::riscv::REG::V26M2_V28M2
@ V26M2_V28M2
Definition riscv/registers.hpp:282
LIEF::assembly::riscv::REG::V13_V14
@ V13_V14
Definition riscv/registers.hpp:251
LIEF::assembly::riscv::REG::F3_D
@ F3_D
Definition riscv/registers.hpp:102
LIEF::assembly::riscv::REG::V11_V12_V13_V14_V15
@ V11_V12_V13_V14_V15
Definition riscv/registers.hpp:388
LIEF::assembly::riscv::REG::V14_V15_V16
@ V14_V15_V16
Definition riscv/registers.hpp:305
LIEF::assembly::riscv::REG::F5_F
@ F5_F
Definition riscv/registers.hpp:136
LIEF::assembly::riscv::REG::F26_F
@ F26_F
Definition riscv/registers.hpp:157
LIEF::assembly::riscv::REG::V0M2_V2M2_V4M2_V6M2
@ V0M2_V2M2_V4M2_V6M2
Definition riscv/registers.hpp:377
LIEF::assembly::riscv::REG::VL
@ VL
Definition riscv/registers.hpp:29
LIEF::assembly::riscv::REG::V4_V5_V6_V7_V8_V9
@ V4_V5_V6_V7_V8_V9
Definition riscv/registers.hpp:409
LIEF::assembly::riscv::REG::V6M2_V8M2_V10M2_V12M2
@ V6M2_V8M2_V10M2_V12M2
Definition riscv/registers.hpp:367
LIEF::assembly::riscv::REG::X2
@ X2
Definition riscv/registers.hpp:69
LIEF::assembly::riscv::REG::X18
@ X18
Definition riscv/registers.hpp:85
LIEF::assembly::riscv::REG::V21_V22_V23
@ V21_V22_V23
Definition riscv/registers.hpp:312
LIEF::assembly::riscv::REG::V16_V17
@ V16_V17
Definition riscv/registers.hpp:254
LIEF::assembly::riscv::REG::F4_D
@ F4_D
Definition riscv/registers.hpp:103
LIEF::assembly::riscv::REG::V16_V17_V18_V19_V20_V21_V22
@ V16_V17_V18_V19_V20_V21_V22
Definition riscv/registers.hpp:448
LIEF::assembly::riscv::REG::V0M4_V4M4
@ V0M4_V4M4
Definition riscv/registers.hpp:291
LIEF::assembly::riscv::REG::V22M2_V24M2_V26M2_V28M2
@ V22M2_V24M2_V26M2_V28M2
Definition riscv/registers.hpp:375
LIEF::assembly::riscv::REG::V12M2_V14M2_V16M2
@ V12M2_V14M2_V16M2
Definition riscv/registers.hpp:327
LIEF::assembly::riscv::REG::V29
@ V29
Definition riscv/registers.hpp:64
LIEF::assembly::riscv::REG::V2M2_V4M2
@ V2M2_V4M2
Definition riscv/registers.hpp:270
LIEF::assembly::riscv::REG::X27
@ X27
Definition riscv/registers.hpp:94
LIEF::assembly::riscv::REG::F22_F
@ F22_F
Definition riscv/registers.hpp:153
LIEF::assembly::riscv::REG::V7_V8_V9_V10
@ V7_V8_V9_V10
Definition riscv/registers.hpp:342
LIEF::assembly::riscv::REG::F21_F
@ F21_F
Definition riscv/registers.hpp:152
LIEF::assembly::riscv::REG::V24_V25_V26_V27
@ V24_V25_V26_V27
Definition riscv/registers.hpp:359
LIEF::assembly::riscv::REG::VXSAT
@ VXSAT
Definition riscv/registers.hpp:33
LIEF::assembly::riscv::REG::V16_V17_V18_V19_V20_V21
@ V16_V17_V18_V19_V20_V21
Definition riscv/registers.hpp:421
LIEF::assembly::riscv::REG::F11_F
@ F11_F
Definition riscv/registers.hpp:142
LIEF::assembly::riscv::REG::V10_V11_V12_V13
@ V10_V11_V12_V13
Definition riscv/registers.hpp:345
LIEF::assembly::riscv::REG::V12_V13_V14_V15_V16_V17
@ V12_V13_V14_V15_V16_V17
Definition riscv/registers.hpp:417
LIEF::assembly::riscv::REG::F29_F
@ F29_F
Definition riscv/registers.hpp:160
LIEF::assembly::riscv::REG::F3_H
@ F3_H
Definition riscv/registers.hpp:166
LIEF::assembly::riscv::REG::V2_V3_V4_V5_V6
@ V2_V3_V4_V5_V6
Definition riscv/registers.hpp:379
LIEF::assembly::riscv::REG::V14
@ V14
Definition riscv/registers.hpp:49
LIEF::assembly::riscv::REG::F20_D
@ F20_D
Definition riscv/registers.hpp:119
LIEF::assembly::riscv::REG::F12_H
@ F12_H
Definition riscv/registers.hpp:175
LIEF::assembly::riscv::REG::V13_V14_V15_V16_V17_V18_V19_V20
@ V13_V14_V15_V16_V17_V18_V19_V20
Definition riscv/registers.hpp:471
LIEF::assembly::riscv::REG::X6_X7
@ X6_X7
Definition riscv/registers.hpp:226
LIEF::assembly::riscv::REG::V19_V20_V21
@ V19_V20_V21
Definition riscv/registers.hpp:310
LIEF::assembly::riscv::REG::F0_H
@ F0_H
Definition riscv/registers.hpp:163
LIEF::assembly::riscv::REG::V12_V13_V14_V15_V16_V17_V18
@ V12_V13_V14_V15_V16_V17_V18
Definition riscv/registers.hpp:444
LIEF::assembly::riscv::REG::V24M4_V28M4
@ V24M4_V28M4
Definition riscv/registers.hpp:290
LIEF::assembly::riscv::REG::V6M2_V8M2
@ V6M2_V8M2
Definition riscv/registers.hpp:272
LIEF::assembly::riscv::REG::V27_V28_V29
@ V27_V28_V29
Definition riscv/registers.hpp:318
LIEF::assembly::riscv::REG::X29
@ X29
Definition riscv/registers.hpp:96
LIEF::assembly::riscv::REG::V17_V18_V19_V20
@ V17_V18_V19_V20
Definition riscv/registers.hpp:352
LIEF::assembly::riscv::REG::V26_V27_V28_V29
@ V26_V27_V28_V29
Definition riscv/registers.hpp:361
LIEF::assembly::riscv::REG::V8_V9_V10_V11
@ V8_V9_V10_V11
Definition riscv/registers.hpp:343
LIEF::assembly::riscv::REG::V4M4
@ V4M4
Definition riscv/registers.hpp:201
LIEF::assembly::riscv::REG::V11_V12
@ V11_V12
Definition riscv/registers.hpp:249
LIEF::assembly::riscv::REG::X24_X25
@ X24_X25
Definition riscv/registers.hpp:235
LIEF::assembly::riscv::REG::V24_V25_V26_V27_V28_V29_V30_V31
@ V24_V25_V26_V27_V28_V29_V30_V31
Definition riscv/registers.hpp:482
LIEF::assembly::riscv::REG::V10_V11_V12_V13_V14_V15
@ V10_V11_V12_V13_V14_V15
Definition riscv/registers.hpp:415
LIEF::assembly::riscv::REG::X14
@ X14
Definition riscv/registers.hpp:81
LIEF::assembly::riscv::REG::V21_V22_V23_V24_V25_V26
@ V21_V22_V23_V24_V25_V26
Definition riscv/registers.hpp:426
LIEF::assembly::riscv::REG::F29_H
@ F29_H
Definition riscv/registers.hpp:192
LIEF::assembly::riscv::REG::V24_V25_V26_V27_V28_V29
@ V24_V25_V26_V27_V28_V29
Definition riscv/registers.hpp:429
LIEF::assembly::riscv::REG::V0_V1_V2_V3_V4
@ V0_V1_V2_V3_V4
Definition riscv/registers.hpp:405
LIEF::assembly::riscv::REG::V17_V18_V19_V20_V21_V22_V23
@ V17_V18_V19_V20_V21_V22_V23
Definition riscv/registers.hpp:449
LIEF::assembly::riscv::REG::F2_F
@ F2_F
Definition riscv/registers.hpp:133
LIEF::assembly::riscv::REG::X12_X13
@ X12_X13
Definition riscv/registers.hpp:229
LIEF::assembly::riscv::REG::V20M2
@ V20M2
Definition riscv/registers.hpp:214
LIEF::assembly::riscv::REG::F23_D
@ F23_D
Definition riscv/registers.hpp:122
LIEF::assembly::riscv::REG::V11_V12_V13_V14_V15_V16_V17
@ V11_V12_V13_V14_V15_V16_V17
Definition riscv/registers.hpp:443
LIEF::assembly::riscv::REG::V18_V19_V20
@ V18_V19_V20
Definition riscv/registers.hpp:309
LIEF::assembly::riscv::REG::V15_V16_V17
@ V15_V16_V17
Definition riscv/registers.hpp:306
LIEF::assembly::riscv::REG::V28M2
@ V28M2
Definition riscv/registers.hpp:221
LIEF::assembly::riscv::REG::X15
@ X15
Definition riscv/registers.hpp:82
LIEF::assembly::riscv::REG::V21_V22_V23_V24_V25_V26_V27_V28
@ V21_V22_V23_V24_V25_V26_V27_V28
Definition riscv/registers.hpp:479
LIEF::assembly::riscv::REG::V4M2_V6M2
@ V4M2_V6M2
Definition riscv/registers.hpp:271
LIEF::assembly::riscv::REG::F7_F
@ F7_F
Definition riscv/registers.hpp:138
LIEF::assembly::riscv::REG::V6M2_V8M2_V10M2
@ V6M2_V8M2_V10M2
Definition riscv/registers.hpp:324
LIEF::assembly::riscv::REG::F22_D
@ F22_D
Definition riscv/registers.hpp:121
LIEF::assembly::riscv::REG::V8_V9_V10_V11_V12
@ V8_V9_V10_V11_V12
Definition riscv/registers.hpp:385
LIEF::assembly::riscv::REG::F20_F
@ F20_F
Definition riscv/registers.hpp:151
LIEF::assembly::riscv::REG::V22_V23
@ V22_V23
Definition riscv/registers.hpp:260
LIEF::assembly::riscv::REG::V23_V24_V25
@ V23_V24_V25
Definition riscv/registers.hpp:314
LIEF::assembly::riscv::REG::X24
@ X24
Definition riscv/registers.hpp:91
LIEF::assembly::riscv::REG::V20_V21_V22
@ V20_V21_V22
Definition riscv/registers.hpp:311
LIEF::assembly::riscv::REG::X9
@ X9
Definition riscv/registers.hpp:76
LIEF::assembly::riscv::REG::V30_V31
@ V30_V31
Definition riscv/registers.hpp:268
LIEF::assembly::riscv::REG::V26_V27_V28
@ V26_V27_V28
Definition riscv/registers.hpp:317
LIEF::assembly::riscv::REG::V10_V11_V12
@ V10_V11_V12
Definition riscv/registers.hpp:301
LIEF::assembly::riscv::REG::X4
@ X4
Definition riscv/registers.hpp:71
LIEF::assembly::riscv::REG::V14M2_V16M2_V18M2
@ V14M2_V16M2_V18M2
Definition riscv/registers.hpp:328
LIEF::assembly::riscv::REG::X20
@ X20
Definition riscv/registers.hpp:87
LIEF::assembly::riscv::REG::V1_V2_V3_V4_V5_V6_V7_V8
@ V1_V2_V3_V4_V5_V6_V7_V8
Definition riscv/registers.hpp:459
LIEF::assembly::riscv::REG::V24_V25_V26_V27_V28
@ V24_V25_V26_V27_V28
Definition riscv/registers.hpp:401
LIEF::assembly::riscv::REG::V6_V7_V8_V9_V10_V11_V12_V13
@ V6_V7_V8_V9_V10_V11_V12_V13
Definition riscv/registers.hpp:464
LIEF::assembly::riscv::REG::F16_H
@ F16_H
Definition riscv/registers.hpp:179
LIEF::assembly::riscv::REG::F9_H
@ F9_H
Definition riscv/registers.hpp:172
LIEF::assembly::riscv::REG::F24_D
@ F24_D
Definition riscv/registers.hpp:123
LIEF::assembly::riscv::REG::V2_V3
@ V2_V3
Definition riscv/registers.hpp:240
LIEF::assembly::riscv::REG::V5_V6_V7_V8
@ V5_V6_V7_V8
Definition riscv/registers.hpp:340
LIEF::assembly::riscv::REG::FRM
@ FRM
Definition riscv/registers.hpp:26
LIEF::assembly::riscv::REG::F28_F
@ F28_F
Definition riscv/registers.hpp:159
LIEF::assembly::riscv::REG::F25_D
@ F25_D
Definition riscv/registers.hpp:124
LIEF::assembly::riscv::REG::F21_D
@ F21_D
Definition riscv/registers.hpp:120
LIEF::assembly::riscv::REG::X16
@ X16
Definition riscv/registers.hpp:83
LIEF::assembly::riscv::REG::F27_D
@ F27_D
Definition riscv/registers.hpp:126
LIEF::assembly::riscv::REG::F21_H
@ F21_H
Definition riscv/registers.hpp:184
LIEF::assembly::riscv::REG::V24M2
@ V24M2
Definition riscv/registers.hpp:217
LIEF::assembly::riscv::REG::V0_V1_V2_V3_V4_V5_V6_V7
@ V0_V1_V2_V3_V4_V5_V6_V7
Definition riscv/registers.hpp:483
LIEF::assembly::riscv::REG::F18_D
@ F18_D
Definition riscv/registers.hpp:117
LIEF::assembly::riscv::REG::V5
@ V5
Definition riscv/registers.hpp:40
LIEF::assembly::riscv::REG::V13
@ V13
Definition riscv/registers.hpp:48
LIEF::assembly::riscv::REG::F23_H
@ F23_H
Definition riscv/registers.hpp:186
LIEF::assembly::riscv::REG::V19_V20_V21_V22
@ V19_V20_V21_V22
Definition riscv/registers.hpp:354
LIEF::assembly::riscv::REG::V23_V24_V25_V26
@ V23_V24_V25_V26
Definition riscv/registers.hpp:358
LIEF::assembly::riscv::REG::F28_H
@ F28_H
Definition riscv/registers.hpp:191
LIEF::assembly::riscv::REG::V10_V11_V12_V13_V14_V15_V16
@ V10_V11_V12_V13_V14_V15_V16
Definition riscv/registers.hpp:442
LIEF::assembly::riscv::REG::V6_V7
@ V6_V7
Definition riscv/registers.hpp:244
LIEF::assembly::riscv::REG::V20_V21_V22_V23
@ V20_V21_V22_V23
Definition riscv/registers.hpp:355
LIEF::assembly::riscv::REG::F19_F
@ F19_F
Definition riscv/registers.hpp:150
LIEF::assembly::riscv::REG::V4_V5
@ V4_V5
Definition riscv/registers.hpp:242
LIEF::assembly::riscv::REG::V23_V24_V25_V26_V27_V28_V29
@ V23_V24_V25_V26_V27_V28_V29
Definition riscv/registers.hpp:455
LIEF::assembly::riscv::REG::F15_H
@ F15_H
Definition riscv/registers.hpp:178
LIEF::assembly::riscv::REG::V24M8
@ V24M8
Definition riscv/registers.hpp:219
LIEF::assembly::riscv::REG::V11
@ V11
Definition riscv/registers.hpp:46
LIEF::assembly::riscv::REG::V5_V6_V7_V8_V9_V10_V11
@ V5_V6_V7_V8_V9_V10_V11
Definition riscv/registers.hpp:437
LIEF::assembly::riscv::REG::V20_V21
@ V20_V21
Definition riscv/registers.hpp:258
LIEF::assembly::riscv::REG::V25_V26
@ V25_V26
Definition riscv/registers.hpp:263
LIEF::assembly::riscv::REG::V28M4
@ V28M4
Definition riscv/registers.hpp:222
LIEF::assembly::riscv::REG::VTYPE
@ VTYPE
Definition riscv/registers.hpp:31
LIEF::assembly::riscv::REG::V7_V8_V9_V10_V11_V12_V13_V14
@ V7_V8_V9_V10_V11_V12_V13_V14
Definition riscv/registers.hpp:465
LIEF::assembly::riscv::REG::V27_V28
@ V27_V28
Definition riscv/registers.hpp:265
LIEF::assembly::riscv::REG::V6M2
@ V6M2
Definition riscv/registers.hpp:202
LIEF::assembly::riscv::REG::F5_H
@ F5_H
Definition riscv/registers.hpp:168
LIEF::assembly::riscv::REG::V12M2
@ V12M2
Definition riscv/registers.hpp:207
LIEF::assembly::riscv::REG::F6_H
@ F6_H
Definition riscv/registers.hpp:169
LIEF::assembly::riscv::REG::V2_V3_V4
@ V2_V3_V4
Definition riscv/registers.hpp:293
LIEF::assembly::riscv::REG::V25_V26_V27_V28_V29_V30
@ V25_V26_V27_V28_V29_V30
Definition riscv/registers.hpp:430
LIEF::assembly::riscv::REG::V22M2_V24M2_V26M2
@ V22M2_V24M2_V26M2
Definition riscv/registers.hpp:332
LIEF::assembly::riscv::REG::V22M2_V24M2
@ V22M2_V24M2
Definition riscv/registers.hpp:280
LIEF::assembly::riscv::REG::V29_V30
@ V29_V30
Definition riscv/registers.hpp:267
LIEF::assembly::riscv::REG::F31_D
@ F31_D
Definition riscv/registers.hpp:130
LIEF::assembly::riscv::REG::V15_V16_V17_V18
@ V15_V16_V17_V18
Definition riscv/registers.hpp:350
LIEF::assembly::riscv::REG::V4M2_V6M2_V8M2
@ V4M2_V6M2_V8M2
Definition riscv/registers.hpp:323
LIEF::assembly::riscv::REG::V13_V14_V15_V16_V17
@ V13_V14_V15_V16_V17
Definition riscv/registers.hpp:390
LIEF::assembly::riscv::REG::V26M2
@ V26M2
Definition riscv/registers.hpp:220
LIEF::assembly::riscv::REG::F14_F
@ F14_F
Definition riscv/registers.hpp:145
LIEF::assembly::riscv::REG::V12_V13_V14_V15
@ V12_V13_V14_V15
Definition riscv/registers.hpp:347
LIEF::assembly::riscv::REG::F22_H
@ F22_H
Definition riscv/registers.hpp:185
LIEF::assembly::riscv::REG::V9_V10_V11_V12_V13
@ V9_V10_V11_V12_V13
Definition riscv/registers.hpp:386
LIEF::assembly::riscv::REG::V8_V9_V10_V11_V12_V13_V14
@ V8_V9_V10_V11_V12_V13_V14
Definition riscv/registers.hpp:440
LIEF::assembly::riscv::REG::V22M2
@ V22M2
Definition riscv/registers.hpp:216
LIEF::assembly::riscv::REG::X12
@ X12
Definition riscv/registers.hpp:79
LIEF::assembly::riscv::REG::V7_V8_V9_V10_V11
@ V7_V8_V9_V10_V11
Definition riscv/registers.hpp:384
LIEF::assembly::riscv::REG::V9_V10_V11_V12_V13_V14
@ V9_V10_V11_V12_V13_V14
Definition riscv/registers.hpp:414
LIEF::assembly::riscv::REG::V8M2
@ V8M2
Definition riscv/registers.hpp:203
LIEF::assembly::riscv::REG::VLENB
@ VLENB
Definition riscv/registers.hpp:30
LIEF::assembly::riscv::REG::V20M4_V24M4
@ V20M4_V24M4
Definition riscv/registers.hpp:289
LIEF::assembly::riscv::REG::V10M2_V12M2
@ V10M2_V12M2
Definition riscv/registers.hpp:274
LIEF::assembly::riscv::REG::V25_V26_V27
@ V25_V26_V27
Definition riscv/registers.hpp:316
LIEF::assembly::riscv::REG::V10_V11
@ V10_V11
Definition riscv/registers.hpp:248
LIEF::assembly::riscv::REG::V21_V22
@ V21_V22
Definition riscv/registers.hpp:259
LIEF::assembly::riscv::REG::V8M2_V10M2_V12M2_V14M2
@ V8M2_V10M2_V12M2_V14M2
Definition riscv/registers.hpp:368
LIEF::assembly::riscv::REG::X16_X17
@ X16_X17
Definition riscv/registers.hpp:231
LIEF::assembly::riscv::REG::V25_V26_V27_V28
@ V25_V26_V27_V28
Definition riscv/registers.hpp:360
LIEF::assembly::riscv::REG::V13_V14_V15_V16
@ V13_V14_V15_V16
Definition riscv/registers.hpp:348
LIEF::assembly::riscv::REG::V12
@ V12
Definition riscv/registers.hpp:47
LIEF::assembly::riscv::REG::V21
@ V21
Definition riscv/registers.hpp:56
LIEF::assembly::riscv::REG::F17_D
@ F17_D
Definition riscv/registers.hpp:116
LIEF::assembly::riscv::REG::F29_D
@ F29_D
Definition riscv/registers.hpp:128
LIEF::assembly::riscv::REG::V9_V10_V11
@ V9_V10_V11
Definition riscv/registers.hpp:300
LIEF::assembly::riscv::REG::V17_V18_V19_V20_V21
@ V17_V18_V19_V20_V21
Definition riscv/registers.hpp:394
LIEF::assembly::riscv::REG::X13
@ X13
Definition riscv/registers.hpp:80
LIEF::assembly::riscv::REG::X10
@ X10
Definition riscv/registers.hpp:77
LIEF::assembly::riscv::REG::NoRegister
@ NoRegister
Definition riscv/registers.hpp:24
LIEF::assembly::riscv::REG::V21_V22_V23_V24_V25_V26_V27
@ V21_V22_V23_V24_V25_V26_V27
Definition riscv/registers.hpp:453
LIEF::assembly::riscv::REG::V15_V16
@ V15_V16
Definition riscv/registers.hpp:253
LIEF::assembly::riscv::REG::V4_V5_V6
@ V4_V5_V6
Definition riscv/registers.hpp:295
LIEF::assembly::riscv::REG::V6_V7_V8_V9_V10_V11
@ V6_V7_V8_V9_V10_V11
Definition riscv/registers.hpp:411
LIEF::assembly::riscv::REG::V4
@ V4
Definition riscv/registers.hpp:39
LIEF::assembly::riscv::REG::V1_V2_V3
@ V1_V2_V3
Definition riscv/registers.hpp:292
LIEF::assembly::riscv::REG::V19_V20_V21_V22_V23_V24
@ V19_V20_V21_V22_V23_V24
Definition riscv/registers.hpp:424
LIEF::assembly::riscv::REG::V14M2
@ V14M2
Definition riscv/registers.hpp:209
LIEF::assembly::riscv::REG::V1
@ V1
Definition riscv/registers.hpp:36
LIEF::assembly::riscv::REG::V16M2_V18M2_V20M2_V22M2
@ V16M2_V18M2_V20M2_V22M2
Definition riscv/registers.hpp:372
LIEF::assembly::riscv::REG::X26
@ X26
Definition riscv/registers.hpp:93
LIEF::assembly::riscv::REG::F27_H
@ F27_H
Definition riscv/registers.hpp:190
LIEF::assembly::riscv::REG::V4M2_V6M2_V8M2_V10M2
@ V4M2_V6M2_V8M2_V10M2
Definition riscv/registers.hpp:366
LIEF::assembly::riscv::REG::V5_V6_V7
@ V5_V6_V7
Definition riscv/registers.hpp:296
LIEF::assembly::riscv::REG::V5_V6_V7_V8_V9
@ V5_V6_V7_V8_V9
Definition riscv/registers.hpp:382
LIEF::assembly::riscv::REG::X8
@ X8
Definition riscv/registers.hpp:75
LIEF::assembly::riscv::REG::F25_F
@ F25_F
Definition riscv/registers.hpp:156
LIEF::assembly::riscv::REG::V7_V8_V9_V10_V11_V12
@ V7_V8_V9_V10_V11_V12
Definition riscv/registers.hpp:412
LIEF::assembly::riscv::REG::DUMMY_REG_PAIR_WITH_X0
@ DUMMY_REG_PAIR_WITH_X0
Definition riscv/registers.hpp:34
LIEF::assembly::riscv::REG::X25
@ X25
Definition riscv/registers.hpp:92
LIEF::assembly::riscv::REG::F1_D
@ F1_D
Definition riscv/registers.hpp:100
LIEF::assembly::riscv::REG::V0_V1_V2_V3_V4_V5
@ V0_V1_V2_V3_V4_V5
Definition riscv/registers.hpp:432
LIEF::assembly::riscv::REG::V20
@ V20
Definition riscv/registers.hpp:55
LIEF::assembly::riscv::REG::X0
@ X0
Definition riscv/registers.hpp:67
LIEF::assembly::riscv::REG::V0M8
@ V0M8
Definition riscv/registers.hpp:198
LIEF::assembly::riscv::REG::V20_V21_V22_V23_V24
@ V20_V21_V22_V23_V24
Definition riscv/registers.hpp:397
LIEF::assembly::riscv::REG::X7
@ X7
Definition riscv/registers.hpp:74
LIEF::assembly::riscv::REG::X1
@ X1
Definition riscv/registers.hpp:68
LIEF::assembly::riscv::REG::V3_V4_V5_V6_V7
@ V3_V4_V5_V6_V7
Definition riscv/registers.hpp:380
LIEF::assembly::riscv::REG::V4_V5_V6_V7_V8
@ V4_V5_V6_V7_V8
Definition riscv/registers.hpp:381
LIEF::assembly::riscv::REG::V19_V20_V21_V22_V23_V24_V25_V26
@ V19_V20_V21_V22_V23_V24_V25_V26
Definition riscv/registers.hpp:477
LIEF::assembly::riscv::REG::V30M2
@ V30M2
Definition riscv/registers.hpp:223
LIEF::assembly::riscv::REG::V16M4_V20M4
@ V16M4_V20M4
Definition riscv/registers.hpp:288
LIEF::assembly::riscv::REG::V22_V23_V24_V25_V26
@ V22_V23_V24_V25_V26
Definition riscv/registers.hpp:399
LIEF::assembly::riscv::REG::F8_D
@ F8_D
Definition riscv/registers.hpp:107
LIEF::assembly::riscv::REG::F4_F
@ F4_F
Definition riscv/registers.hpp:135
LIEF::assembly::riscv::REG::V16_V17_V18_V19_V20
@ V16_V17_V18_V19_V20
Definition riscv/registers.hpp:393
LIEF::assembly::riscv::REG::V22_V23_V24_V25
@ V22_V23_V24_V25
Definition riscv/registers.hpp:357
LIEF::assembly::riscv::REG::F17_F
@ F17_F
Definition riscv/registers.hpp:148
LIEF::assembly::riscv::REG::V14_V15_V16_V17_V18_V19_V20_V21
@ V14_V15_V16_V17_V18_V19_V20_V21
Definition riscv/registers.hpp:472
LIEF::assembly::riscv::REG::F20_H
@ F20_H
Definition riscv/registers.hpp:183
LIEF::assembly::riscv::REG::V18
@ V18
Definition riscv/registers.hpp:53
LIEF::assembly::riscv::REG::V8M2_V10M2_V12M2
@ V8M2_V10M2_V12M2
Definition riscv/registers.hpp:325
LIEF::assembly::riscv::REG::FFLAGS
@ FFLAGS
Definition riscv/registers.hpp:25
LIEF::assembly::riscv::REG::SSP
@ SSP
Definition riscv/registers.hpp:27
LIEF::assembly::riscv::REG::X31
@ X31
Definition riscv/registers.hpp:98
LIEF::assembly::riscv::REG::X26_X27
@ X26_X27
Definition riscv/registers.hpp:236
LIEF::assembly::riscv::REG::V17_V18
@ V17_V18
Definition riscv/registers.hpp:255
LIEF::assembly::riscv::REG::V18_V19_V20_V21
@ V18_V19_V20_V21
Definition riscv/registers.hpp:353
LIEF::assembly::riscv::REG::V12_V13_V14
@ V12_V13_V14
Definition riscv/registers.hpp:303
LIEF::assembly::riscv::REG::X10_X11
@ X10_X11
Definition riscv/registers.hpp:228
LIEF::assembly::riscv::REG::V12_V13_V14_V15_V16_V17_V18_V19
@ V12_V13_V14_V15_V16_V17_V18_V19
Definition riscv/registers.hpp:470
LIEF::assembly::riscv::REG::X30
@ X30
Definition riscv/registers.hpp:97
LIEF::assembly::riscv::REG::F7_D
@ F7_D
Definition riscv/registers.hpp:106
LIEF::assembly::riscv::REG::F25_H
@ F25_H
Definition riscv/registers.hpp:188
LIEF::assembly::riscv::REG::V8M4_V12M4
@ V8M4_V12M4
Definition riscv/registers.hpp:286
LIEF::assembly::riscv::REG::F30_F
@ F30_F
Definition riscv/registers.hpp:161
LIEF::assembly::riscv::REG::X11
@ X11
Definition riscv/registers.hpp:78
LIEF::assembly::riscv::REG::X4_X5
@ X4_X5
Definition riscv/registers.hpp:225
LIEF::assembly::riscv::REG::V22_V23_V24_V25_V26_V27_V28_V29
@ V22_V23_V24_V25_V26_V27_V28_V29
Definition riscv/registers.hpp:480
LIEF::assembly::riscv::REG::X8_X9
@ X8_X9
Definition riscv/registers.hpp:227
LIEF::assembly::riscv::REG::F30_H
@ F30_H
Definition riscv/registers.hpp:193
LIEF::assembly::riscv::REG::V3_V4_V5_V6
@ V3_V4_V5_V6
Definition riscv/registers.hpp:338
LIEF::assembly::riscv::REG::V3
@ V3
Definition riscv/registers.hpp:38
LIEF::assembly::riscv::REG::F8_F
@ F8_F
Definition riscv/registers.hpp:139
LIEF::assembly::riscv::REG::X14_X15
@ X14_X15
Definition riscv/registers.hpp:230
LIEF::assembly::riscv::REG::V11_V12_V13
@ V11_V12_V13
Definition riscv/registers.hpp:302
LIEF::assembly::riscv::REG::V16M8
@ V16M8
Definition riscv/registers.hpp:212
LIEF::assembly::riscv::REG::V0M2
@ V0M2
Definition riscv/registers.hpp:196
LIEF::assembly::riscv::REG::V5_V6
@ V5_V6
Definition riscv/registers.hpp:243
LIEF::assembly::riscv::REG::X30_X31
@ X30_X31
Definition riscv/registers.hpp:238
LIEF::assembly::riscv::REG::V10_V11_V12_V13_V14_V15_V16_V17
@ V10_V11_V12_V13_V14_V15_V16_V17
Definition riscv/registers.hpp:468
LIEF::assembly::riscv::REG::F10_F
@ F10_F
Definition riscv/registers.hpp:141
LIEF::assembly::riscv::REG::X18_X19
@ X18_X19
Definition riscv/registers.hpp:232
LIEF::assembly::riscv::REG::V4_V5_V6_V7
@ V4_V5_V6_V7
Definition riscv/registers.hpp:339
LIEF::assembly::riscv::REG::V11_V12_V13_V14_V15_V16
@ V11_V12_V13_V14_V15_V16
Definition riscv/registers.hpp:416
LIEF::assembly::riscv::REG::F8_H
@ F8_H
Definition riscv/registers.hpp:171
LIEF::assembly::riscv::REG::V20_V21_V22_V23_V24_V25_V26
@ V20_V21_V22_V23_V24_V25_V26
Definition riscv/registers.hpp:452
LIEF::assembly::riscv::REG::V6
@ V6
Definition riscv/registers.hpp:41
LIEF::assembly::riscv::REG::F19_D
@ F19_D
Definition riscv/registers.hpp:118
LIEF::assembly::riscv::REG::V8M2_V10M2
@ V8M2_V10M2
Definition riscv/registers.hpp:273
LIEF::assembly::riscv::REG::V24_V25_V26
@ V24_V25_V26
Definition riscv/registers.hpp:315
LIEF::assembly::riscv::REG::V4M4_V8M4
@ V4M4_V8M4
Definition riscv/registers.hpp:285
LIEF::assembly::riscv::REG::V9_V10_V11_V12
@ V9_V10_V11_V12
Definition riscv/registers.hpp:344
LIEF::assembly::riscv::REG::V16_V17_V18_V19
@ V16_V17_V18_V19
Definition riscv/registers.hpp:351
LIEF::assembly::riscv::REG::V26_V27_V28_V29_V30
@ V26_V27_V28_V29_V30
Definition riscv/registers.hpp:403
LIEF::assembly::riscv::REG::F15_F
@ F15_F
Definition riscv/registers.hpp:146
LIEF::assembly::riscv::REG::V0M2_V2M2_V4M2
@ V0M2_V2M2_V4M2
Definition riscv/registers.hpp:335
LIEF::assembly::riscv::REG::V24_V25_V26_V27_V28_V29_V30
@ V24_V25_V26_V27_V28_V29_V30
Definition riscv/registers.hpp:456
LIEF::assembly::riscv::REG::X6
@ X6
Definition riscv/registers.hpp:73
LIEF::assembly::riscv::REG::V10M2
@ V10M2
Definition riscv/registers.hpp:206
LIEF::assembly::riscv::REG::V19_V20
@ V19_V20
Definition riscv/registers.hpp:257
LIEF::assembly::riscv::REG::F15_D
@ F15_D
Definition riscv/registers.hpp:114
LIEF::assembly::riscv::REG::V14M2_V16M2
@ V14M2_V16M2
Definition riscv/registers.hpp:276
LIEF::assembly::riscv::REG::V7_V8_V9
@ V7_V8_V9
Definition riscv/registers.hpp:298
LIEF::assembly::riscv::REG::V8M4
@ V8M4
Definition riscv/registers.hpp:204
LIEF::assembly::riscv::REG::V2_V3_V4_V5
@ V2_V3_V4_V5
Definition riscv/registers.hpp:337
LIEF::assembly::riscv::REG::V0_V1_V2_V3
@ V0_V1_V2_V3
Definition riscv/registers.hpp:364
LIEF::assembly::riscv::REG::V10M2_V12M2_V14M2
@ V10M2_V12M2_V14M2
Definition riscv/registers.hpp:326
LIEF::assembly::riscv::REG::X22_X23
@ X22_X23
Definition riscv/registers.hpp:234
LIEF::assembly::riscv::REG::V22_V23_V24_V25_V26_V27_V28
@ V22_V23_V24_V25_V26_V27_V28
Definition riscv/registers.hpp:454
LIEF::assembly::riscv::REG::X17
@ X17
Definition riscv/registers.hpp:84
LIEF::assembly::riscv::REG::V20M2_V22M2_V24M2
@ V20M2_V22M2_V24M2
Definition riscv/registers.hpp:331
LIEF::assembly::riscv::REG::V1_V2_V3_V4
@ V1_V2_V3_V4
Definition riscv/registers.hpp:336
LIEF::assembly::riscv::REG::V14_V15_V16_V17_V18
@ V14_V15_V16_V17_V18
Definition riscv/registers.hpp:391
LIEF::assembly::riscv::REG::V12_V13_V14_V15_V16
@ V12_V13_V14_V15_V16
Definition riscv/registers.hpp:389
LIEF::assembly::riscv::REG::V8
@ V8
Definition riscv/registers.hpp:43
LIEF::assembly::riscv::REG::V14M2_V16M2_V18M2_V20M2
@ V14M2_V16M2_V18M2_V20M2
Definition riscv/registers.hpp:371
LIEF::assembly::riscv::REG::V20_V21_V22_V23_V24_V25
@ V20_V21_V22_V23_V24_V25
Definition riscv/registers.hpp:425
LIEF::assembly::riscv::REG::V2
@ V2
Definition riscv/registers.hpp:37
LIEF::assembly::riscv::REG::V10_V11_V12_V13_V14
@ V10_V11_V12_V13_V14
Definition riscv/registers.hpp:387
LIEF::assembly::riscv::REG::V8_V9
@ V8_V9
Definition riscv/registers.hpp:246
LIEF::assembly::riscv::REG::F14_H
@ F14_H
Definition riscv/registers.hpp:177
LIEF::assembly::riscv::REG::V2_V3_V4_V5_V6_V7_V8_V9
@ V2_V3_V4_V5_V6_V7_V8_V9
Definition riscv/registers.hpp:460
LIEF::assembly::riscv::REG::F28_D
@ F28_D
Definition riscv/registers.hpp:127
LIEF::assembly::riscv::REG::V0M2_V2M2
@ V0M2_V2M2
Definition riscv/registers.hpp:284
LIEF::assembly::riscv::REG::F31_F
@ F31_F
Definition riscv/registers.hpp:162
LIEF::assembly::riscv::REG::V12M2_V14M2_V16M2_V18M2
@ V12M2_V14M2_V16M2_V18M2
Definition riscv/registers.hpp:370
LIEF::assembly::riscv::REG::F9_D
@ F9_D
Definition riscv/registers.hpp:108
LIEF::assembly::riscv::REG::V14_V15_V16_V17_V18_V19_V20
@ V14_V15_V16_V17_V18_V19_V20
Definition riscv/registers.hpp:446
LIEF::assembly::riscv::REG::V4M2
@ V4M2
Definition riscv/registers.hpp:200
LIEF::assembly::riscv::REG::V25
@ V25
Definition riscv/registers.hpp:60
LIEF::assembly::riscv::REG::V21_V22_V23_V24_V25
@ V21_V22_V23_V24_V25
Definition riscv/registers.hpp:398
LIEF::assembly::riscv::REG::V8_V9_V10_V11_V12_V13
@ V8_V9_V10_V11_V12_V13
Definition riscv/registers.hpp:413
LIEF::assembly::riscv::REG::V19_V20_V21_V22_V23_V24_V25
@ V19_V20_V21_V22_V23_V24_V25
Definition riscv/registers.hpp:451
LIEF::assembly::riscv::REG::V1_V2
@ V1_V2
Definition riscv/registers.hpp:239
LIEF::assembly::riscv::REG::F6_D
@ F6_D
Definition riscv/registers.hpp:105
LIEF::assembly::riscv::REG::V18_V19_V20_V21_V22_V23_V24
@ V18_V19_V20_V21_V22_V23_V24
Definition riscv/registers.hpp:450
LIEF::assembly::riscv::REG::V20_V21_V22_V23_V24_V25_V26_V27
@ V20_V21_V22_V23_V24_V25_V26_V27
Definition riscv/registers.hpp:478
LIEF::assembly::riscv::REG::V1_V2_V3_V4_V5_V6
@ V1_V2_V3_V4_V5_V6
Definition riscv/registers.hpp:406
LIEF::assembly::riscv::REG::V1_V2_V3_V4_V5
@ V1_V2_V3_V4_V5
Definition riscv/registers.hpp:378
LIEF::assembly::riscv::REG::V31
@ V31
Definition riscv/registers.hpp:66
LIEF::assembly::riscv::REG::V27
@ V27
Definition riscv/registers.hpp:62
LIEF::assembly::riscv::REG::F1_H
@ F1_H
Definition riscv/registers.hpp:164
LIEF::assembly::riscv::REG::VCIX_STATE
@ VCIX_STATE
Definition riscv/registers.hpp:28
LIEF::assembly::riscv::REG::V5_V6_V7_V8_V9_V10_V11_V12
@ V5_V6_V7_V8_V9_V10_V11_V12
Definition riscv/registers.hpp:463
LIEF::assembly::riscv::REG::X20_X21
@ X20_X21
Definition riscv/registers.hpp:233
LIEF::assembly::riscv::REG::V20M2_V22M2_V24M2_V26M2
@ V20M2_V22M2_V24M2_V26M2
Definition riscv/registers.hpp:374
LIEF::assembly::riscv::REG::X28
@ X28
Definition riscv/registers.hpp:95
LIEF::assembly::riscv::get_register_name
const char * get_register_name(REG r)
LIEF::assembly
Namespace related to assembly/disassembly support.
Definition Abstract/Binary.hpp:43
LIEF
LIEF namespace.
Definition Abstract/Binary.hpp:36
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