This class represents a Mips instruction (including mips64, mips32).
Public Types
Public Functions
The instruction opcode as defined in LLVM.
Iterator over the operands of the current instruction.
Public Static Functions
True if inst is an effective instance of mips::Instruction.
See LIEF::assembly::mips::OPCODE in include/asm/mips/opcodes.hpp
This class represents an operand for a Mips instruction.
Subclassed by LIEF::assembly::mips::operands::Immediate, LIEF::assembly::mips::operands::Memory, LIEF::assembly::mips::operands::PCRelative, LIEF::assembly::mips::operands::Register
Public Functions
Pretty representation of the operand.
This function can be used to down cast an Operand instance:
std::unique_ptr<assembly::mips::Operand> op = ...;
if (const auto* imm = inst->as<assembly::mips::operands::Immediate>()) {
const int64_t value = imm->value();
}
This class represents a memory operand.
MIPS has two addressing forms:
lw $4, 8($5) ldxc1 $f2, $4($7)
| | | | | |
+------+ | +---+ +-------+ | +-----+
| | | | | |
v v v v v v
Reg Disp Base Reg Index Base
Public Functions
The base register.
For lw $4, 8($5) it would return $5.
The addressing offset.
It can be either:
A register (e.g. ldxc1 $f2, $4($7))
A displacement (e.g. lw $4, 8($5))
Wraps the memory offset as either an integer displacement or an index register.
Public Types
Enum type used to discriminate the anonymous union.
Values:
The union holds the REG attribute.
The union holds the displacement attribute (int64_t).