
Bases: Instruction
This class represents a Mips instruction (including mips64, mips32)
The instruction opcode as defined in LLVM
Iterator over the operands of the current instruction
See: lief.assembly.mips.OPCODE

Bases: object
This class represents an operand for a Mips instruction
Pretty representation of the operand



Bases: Operand
This class represents a memory operand.
lw $4, 8($5) ldxc1 $f2, $4($7)
| | | | | |
+------+ | +---+ +-------+ | +-----+
| | | | | |
v v v v v v
Reg Disp Base Reg Index Base
The base register.
For lw $4, 8($5) it would return $5.
The addressing offset.
It can be either:
A register (e.g. ldxc1 $f2, $4($7))
A displacement (e.g. lw $4, 8($5))
