
Bases: Instruction
This class represents a PowerPC (ppc64/ppc32) instruction
The instruction opcode as defined in LLVM
Iterator over the operands of the current instruction
See: lief.assembly.powerpc.OPCODE

Bases: object
This class represents an operand for a PowerPC instruction
Pretty representation of the operand


Bases: Operand
This class represents a register operand.
For instance:
add 3, 4, 5
| | |
| | +---------> Register(5)
| +------------> Register(4)
+---------------> Register(3)
The effective lief.assembly.powerpc.REG wrapped by this operand

Bases: Operand
This class represents a memory operand.
lwz 3, 8(4) lwzx 3, 4, 5
| | | | |
+------+ +---+ +------+ | +---+
| | | | |
v v v v v
Disp Base Reg Base Index
The base register.
For lwz 3, 8(4) it would return 4.
The addressing offset.
It can be either:
An index register (e.g. lwzx 3, 4, 5)
A displacement (e.g. lwz 3, 8(4))
